AS3421 datasheet(42/61 Pages) AMSCO

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AS3421 AS3422

Datasheet - R e g i s t e r D e s c r i p t i o n

Table 35. GP_OP Register

Name

Base

Default

GP_OP

2-wire serial

00h (OTP)

Offset: 34h

OTP General Purpose Operational Amplifier Register

Enables the opamp stages, defines opamp 2 mode and gain and sets the HP input multiplexer. This is

a special register, writing needs to be enabled by writing 10b to Reg 3Fh first. This register is reset at

POR and gets loaded with the OTP fuse contents.

Bit

Bit Name

Default

Access

Bit Description

7:6

HP_MUX_OTP<1:0>

R/W

Multiplexes the analog audio signal to HP amp

00: MIC: selects QMICL/R output

01:OP1: selects QOP1L/R outputs

10:OP2: selects QOP2L/R output

11: open: no signal mixed together with the line input signal

5:2

OP2_OTP<3:0>

0000

R/W

Mode and volume settings for OP2, adjustable in 15 steps of 0.75dB

0000: OP2L in inverting mode

0001: 0 dB gain, OP2L in non inverting mode

0001: 0.75 dB gain, non inverting

..,

1110: 9.75dB gain, non inverting

1111:.10.5 dB gain, non inverting

OP2_ON

R/W

0: OP2 is switched off

1: left OP2 is enabled

OPL_ON

R/W

0: OP1 is switched off

1: OP1 is enabled

Table 36. OTP_SYS Register

Name

Base

Default

OTP_SYS

2-wire serial

40h (OTP)

Offset: 35h

OTP System Settings Register

Defines several system settings for OTP operation. This is a special register, writing needs to be enabled

by writing 10b to Reg 3Fh first. This register is reset at POR and gets loaded with the OTP fuse contents.

Bit

Bit Name

Default

Access

Bit Description

MAIN_LOCK

R/W

0: additional bits can be fused inside the OTP

1: OTP fusing gets locked, no more changes can be done

TEST_BIT_3

for testing purpose only

5:4

MON_HP_MUX

<1:0>

R/W

Multiplexes the analog audio signal to HP amp in monitor mode

00: MIC: selects QMICL/R output

01: OP1: selects QOP1L/R outputs

10:OP2: selects QOP2L/R output

11: open: no signal mixed together with the line input signal

CP_MODE_OTP

R/W

This bit controls the operating mode of the microphone supply charge pump.

0: Standard low noise operation

1: Increased output voltage

MICS_CP_OFF

R/W

0: MICS charge pump is enabled

1: MICS charge pump is switched off

I2C

R/W

0: I2C and stand alone mode start-up possible

1: chip starts-up in I2C mode only

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