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ADS5292IPFPR 数据表(PDF) 9 Page - Texas Instruments |
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ADS5292IPFPR 数据表(HTML) 9 Page - Texas Instruments |
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9 / 67 page ![]() GND Logic 0 OUTP OUTM GND Logic 0 V = -350 mV* ODL Logic 0 V = +350 mV* ODH VOCM *With external 100- termination W ADS5292 www.ti.com SLAS788B – NOVEMBER 2011 – REVISED JULY 2012 DIGITAL CHARACTERISTICS The DC specifications refer to the condition where the digital outputs are not switching, but are permanently at a valid logic level 0 or 1. AVDD = 1.8V, LVDD = 1.8V PARAMETERS CONDITION MIN TYP MAX UNITS DIGITAL INPUTS/OUTPUTS All digital inputs support 1.8-V and 3.3-V CMOS logic VIH Logic high input voltage 1.3 V levels. VIL Logic low input voltage 0.4 V IIH Logic high input current VHIGH = 1.8 V 6 µA IIL Logic low input current VLOW = 0 V <0.1 µA VOH Logic high output voltage AVDD-0.1 V VOL Logic low output voltage 0.2 V LVDS OUTPUTS VODH High-level output differential voltage 100 Ω external termination 240 350 405 mV VODL Low-level output differential voltage 100 Ω external termination –240 –350 –405 mV VOCM Output common-mode voltage 900 1100 1300 mV Figure 2. LVDS Output Voltage Levels Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s) :ADS5292 |
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