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STM8S207MB 数据表(PDF) 45 Page - STMicroelectronics

部件名 STM8S207MB
功能描述  Performance line, 24 MHz STM8S 8-bit MCU, up to 128 KB Flash
PDF  103 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM8S207MB 数据表(HTML) 45 Page - STMicroelectronics

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STM8S207xx, STM8S208xx
Interrupt vector mapping
Doc ID 14733 Rev 12
45/103
7
Interrupt vector mapping
Table 11.
Interrupt mapping
IRQ
no.
Source
block
Description
Wakeup from
Halt mode
Wakeup from
Active-halt mode
Vector address
RESET
Reset
Yes
Yes
0x00 8000
TRAP
Software interrupt
-
-
0x00 8004
0
TLI
External top level interrupt
-
-
0x00 8008
1
AWU
Auto wake up from halt
-
Yes
0x00 800C
2
CLK
Clock controller
-
-
0x00 8010
3
EXTI0
Port A external interrupts
Yes(1)
Yes(1)
0x00 8014
4
EXTI1
Port B external interrupts
Yes
Yes
0x00 8018
5
EXTI2
Port C external interrupts
Yes
Yes
0x00 801C
6
EXTI3
Port D external interrupts
Yes
Yes
0x00 8020
7
EXTI4
Port E external interrupts
Yes
Yes
0x00 8024
8
beCAN
beCAN RX interrupt
Yes
Yes
0x00 8028
9
beCAN
beCAN TX/ER/SC interrupt
-
-
0x00 802C
10
SPI
End of transfer
Yes
Yes
0x00 8030
11
TIM1
TIM1 update/overflow/underflow/
trigger/break
-
-
0x00 8034
12
TIM1
TIM1 capture/compare
-
-
0x00 8038
13
TIM2
TIM2 update /overflow
-
-
0x00 803C
14
TIM2
TIM2 capture/compare
-
-
0x00 8040
15
TIM3
Update/overflow
-
-
0x00 8044
16
TIM3
Capture/compare
-
-
0x00 8048
17
UART1
Tx complete
-
-
0x00 804C
18
UART1
Receive register DATA FULL
-
-
0x00 8050
19
I2CI2C interrupt
Yes
Yes
0x00 8054
20
UART3
Tx complete
-
-
0x00 8058
21
UART3
Receive register DATA FULL
-
-
0x00 805C
22
ADC2
ADC2 end of conversion
-
-
0x00 8060
23
TIM4
TIM4 update/overflow
-
-
0x00 8064
24
Flash
EOP/WR_PG_DIS
-
-
0x00 8068
Reserved
0x00 806C to
0x00 807C
1.
Except PA1



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