M24LR64E-R datasheet(19/140 Pages) STMICROELECTRONICS

部件名	M24LR64E-R

功能描述	64-Kbit EEPROM with password protection, dual interface & energy harvesting: 400 kHz I²C bus & ISO 15693 RF protocol at 13.56 MHz

PDF	140 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

19 / 140 page

M24LR64E-R

User memory organization

Doc ID 022712 Rev 3

19/140

User memory organization

The M24LR64E-R is divided into 16 sectors of 32 blocks of 32 bits, as shown in Table 5.

Figure 6 shows the memory sector organization. Each sector can be individually read-

and/or write-protected using a specific password command. Read and write operations are

possible if the addressed data is not in a protected sector.

The M24LR64E-R also has a 64-bit block that is used to store the 64-bit unique identifier

(UID). The UID is compliant with the ISO 15963 description, and its value is used during the

anticollision sequence (Inventory). This block is not accessible by the user and its value is

written by ST on the production line.

The M24LR64E-R includes an AFI register that stores the application family identifier, and a

DSFID register that stores the data storage family identifier used in the anticollision

algorithm.

The M24LR64E-R has four 32-bit blocks that store an I2C password plus three RF password

codes.

Figure 5.

Circuit diagram

MS19780V1

RF VCC

AC0

AC1

Power management

Vout

RF WIP/BUSY

Logic

EEPROM

Latch

Contact VCC

SCL

SDA

VCC

VSS

M24LR64E-R 数据表(PDF) 19 Page - STMicroelectronics

M24LR64E-R 数据表(HTML) 19 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载