MAS6502 datasheet(3/20 Pages) MAS

3 / 20 page

DA6502.008

29 November 2012

3 (20)

ELECTRICAL CHARACTERISTICS

TA = -40

oC to +85oC, VDD = 2.0V to 3.6V, Typ T

A = 27

oC, Typ VDD = 2.35 V, R

sensor = 4.5kΩ unless otherwise noted

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Average ADC Current

during Conversion Time

ICONV

Pressure mode

Temperature mode

100

185

200

330

350

µA

Average ADC Current in

Pressure Measurement

during Conversion Period

(no sensor current

included)

IADC_P

1 conversion/s, Rsensor = 4.5 kΩ,

OSR=512

OSR=256

OSR=128

OSR=64

0.4

0.2

0.1

0.06

1.0

0.5

0.3

0.15

1.7

0.9

0.5

0.26

µA

Average ADC Current in

Temperature Measurement

during Conversion Period

(no sensor current

included)

IADC_T

1 conversion/s, Rsensor = 4.5 kΩ,

OSR=512

OSR=256

OSR=128

OSR=64

0.8

0.4

0.2

0.1

2.0

1.0

0.5

0.3

3.5

1.8

0.95

0.5

µA

Average Supply Current in

Pressure Measurement

during Conversion Period

(including sensor bridge

current)

ISAVG_P

1 conversion/s, Rsensor = 4.5 kΩ,

OSR=512

OSR=256

OSR=128

OSR=64

1.8

0.95

0.5

0.3

2.4

1.2

0.7

0.4

3.1

1.6

0.9

0.5

µA

Average Supply Current in

Temperature Measurement

(including sensor bridge

current)

ISAVG_T

1 conversion/s, Rsensor = 4.5 kΩ,

OSR=512

OSR=256

OSR=128

OSR=64

1.4

0.7

0.4

0.2

2.5

1.3

0.7

0.4

4.0

2.1

1.1

0.6

µA

Peak Supply Current

During Pressure

Measurement

ISC_P

VDD = 2.35 V, Rsensor = 4.5 kΩ

0.6

0.7

0.85

Peak Supply Current

During Temperature

Measurement

ISC_T

VDD = 2.35 V, Rsensor = 4.5 kΩ

0.2

0.3

0.46

Standby Current

ISS

VDD = 2.35 V

Note 1.

0.05

0.5

µA

Internal System Clock

Frequency

DCLK

Pressure measurement

Temperature measurement

42.5

100

113

56.5

kHz

Pressure Conversion Time

tCONV_P

DCLK = 100 kHz,

OSR=512

OSR=256

OSR=128

OSR=64

4.6

2.4

1.2

0.7

5.3

2.7

1.5

0.8

6.2

3.2

1.7

0.95

Temperature Conversion

Time

tCONV_T

DCLK = 50 kHz,

OSR=512

OSR=256

OSR=128

OSR=64

9.3

4.8

2.5

1.4

10.6

5.5

2.9

1.6

12.4

6.4

3.4

1.9

VDD Rise Time for Proper

Power On Reset (POR)

t VDD_RISE

Note 2.

400

Note 1. Leakage current may increase if digital input voltages are not close to VDD (logic level high) or GND (logic level low)

Note 2. Device reset by using XCLR pin or reset register (30HEX) is necessary in case the VDD rise time is longer than specified here.

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