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AD9852ASQ 数据表(PDF) 1 Page - Analog Devices |
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AD9852ASQ 数据表(HTML) 1 Page - Analog Devices |
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1 / 42 page ![]() REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD9852 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 CMOS 300 MHz Complete-DDS FUNCTIONAL BLOCK DIAGRAM PHASE/OFFSET MODULATION INV. SINC FILTER 14-BIT PHASE OFFSET/ MODULATION 48-BIT FREQUENCY TUNING WORD FREQUENCY TUNING WORD/PHASE WORD MULTIPLEXER AND RAMP START STOP LOGIC RAMP-UP/-DOWN CLOCK/LOGIC AND MULTIPLEXER 12-BIT DATA PROGRAMMABLE RATE AND UPDATE CLOCKS 12 12 12 COMPARATOR AMPLITUDE MODULATION DATA 12-BIT CONTROL DAC PROGRAMMING REGISTERS 4 –20 REF CLK MULTI- PLEXER AD9852 DIFF/SINGLE SELECT REFERENCE CLOCK IN FSK/BPSK/HOLD DATA IN BIDIRECTIONAL I/O UPDATE READ WRITE SERIAL/PARALLEL SELECT 6-BIT ADDRESS OR SERIAL PROGRAMMING LINES 8-BIT PARALLEL LOAD MASTER RESET +VS GND CLOCK OUT ANALOG IN SHAPED ON/OFF KEYING ANALOG OUT DAC RSET ANALOG OUT 300MHz DDS I Q DIGITAL MULTIPLIER 12-BIT DDS DAC I/O PORT BUFFERS FEATURES 300 MHz Internal Clock Rate Integrated 12-Bit Output DACs Ultrahigh-Speed, 3 ps RMS Jitter Comparator Excellent Dynamic Performance: 80 dB SFDR @ 100 MHz ( 1 MHz) AOUT 4 to 20 Programmable Reference Clock Multiplier Dual 48-Bit Programmable Frequency Registers Dual 14-Bit Programmable Phase Offset Registers 12-Bit Amplitude Modulation and Programmable Shaped On/Off Keying Function Single Pin FSK and PSK Data Interface Linear or Nonlinear FM Chirp Functions with Single Pin Frequency “Hold” Function Frequency-Ramped FSK <25 ps RMS Total Jitter in Clock Generator Mode Automatic Bidirectional Frequency Sweeping SIN(x)/x Correction Simplified Control Interface 10 MHz Serial, 2-Wire or 3-Wire SPI-Compatible or 100 MHz Parallel 8-Bit Programming 3.3 V Single Supply Multiple Power-Down Functions Single-Ended or Differential Input Reference Clock Small 80-Lead LQFP Packaging APPLICATIONS Agile, L.O. Frequency Synthesis Programmable Clock Generator FM Chirp Source for Radar and Scanning Systems Test and Measurement Equipment Commercial and Amateur RF Exciter GENERAL DESCRIPTION The AD9852 digital synthesizer is a highly integrated device that uses advanced DDS technology, coupled with an internal high-speed, high-performance D/A converters and a comparator to form a digitally-programmable agile synthesizer function. When referenced to an accurate clock source, the AD9852 generates a highly stable, frequency-phase amplitude-programmable sine wave output that can be used as an agile L.O. in communications, radar, and many other applications. The AD9852’s innovative high-speed DDS core provides 48-bit frequency resolution (1 microHertz tuning steps). Phase truncation to 17 bits assures excellent SFDR. The AD9852’s circuit architecture allows the (continued on page 13) |
类似零件编号 - AD9852ASQ |
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类似说明 - AD9852ASQ |
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