AD9888SLASHPCB datasheet(29/32 Pages) AD

29 / 32 page

REV. A

AD9888

–29–

analog supply voltage. This can be mitigated by regulating the

analog supply, or at least PVd, from a different, cleaner, power

source (for example, from a 12 V supply).

It is also recommended to use a single ground plane for the

entire board. Experience has repeatedly shown that the noise

performance is the same or better with a single ground plane.

Using multiple ground planes can be detrimental because each

separate ground plane is smaller, and long ground loops can result.

In some cases, using separate ground planes is unavoidable. For

those cases, it is recommended to at least place a single ground

plane under the AD9888. The location of the split should be at

the receiver of the digital outputs. For this case it is even more

important to place components wisely because the current loops

will be much longer (current takes the path of least resistance).

An example of a current loop: power plane => AD9888 =>

digital output trace => digital data receiver => digital ground

plane => analog ground plane.

PLL

Place the PLL loop filter components as close to the FILT pin

as possible.

Do not place any digital or other high-frequency traces near these

components.

Use the values suggested in the data sheet with 10% tolerances

or less.

Outputs (Both Data and Clocks)

Try to minimize the trace length that the digital outputs have to

drive. Longer traces have higher capacitance, requiring more

current and causing more internal digital noise.

Shorter traces reduce the possibility of reflections.

Adding a series resistor of value 50

Ω–200 Ω can suppress

reflections, reduce EMI, and reduce the current spikes inside

the AD9888. If series resistors are used, place them as close to

the AD9888 pins as possible (although try not to add vias or extra

length to the output trace in order to get the resistors closer).

If possible, limit the capacitance that each of the digital outputs

drives to less than 10 pF. This can easily be accomplished by

keeping traces short and by connecting the outputs to only one

device. Loading the outputs with excessive capacitance will

increase the current transients inside of the AD9888 creating

more digital noise on its power supplies.

Digital Inputs

The digital inputs on the AD9888 were designed to work with

3.3 V signals, but are tolerant of 5.0 V signals. So, no extra

components need to be added if using 5.0 V logic.

Any noise that gets onto the Hsync input trace will add jitter to

the system. Therefore, minimize the trace length and do not run

any digital or other high-frequency traces near it.

Voltage Reference

Bypass with a 0.1

µF capacitor. Place as close to the AD9888

pin as possible. Make the ground connection as short as possible.

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