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APFCON 数据表(PDF) 29 Page - Microchip Technology |
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APFCON 数据表(HTML) 29 Page - Microchip Technology |
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29 / 222 page  2013 Microchip Technology Inc. DS22331A-page 29 MCP19111 FIGURE 5-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER TIMING TABLE 5-2: CLKOUT AND I/O TIMING REQUIREMENTS Param No. Sym Characteristic Min Typ† Max Units Conditions 17 TosH2ioV OSC1 (Q1 cycle) to — 50 150* ns Port out valid — — 300 ns 18 TosH2ioI OSC1 (Q2 cycle) to Port input invalid (I/O in hold time) 100 — — ns 19 TioV2osH Port input valid to OSC1 (I/O in setup time) 0— — ns 20 TioR Port output rise time — 10 40 ns 21 TioF Port output fall time — 10 40 ns 22 22A Tinp INT pin high or low time 25 40 — — — — ns ns 23 23A Trbp Trbp Port A change INT high or low time Tcy — — ns * These parameters are characterized but not tested. † Data in “Typ” column is at VIN =12V (VDD =5V), +25C unless otherwise stated. VDD MCLR Internal POR PWRT Time-out OSC Time-out Internal Reset Watchdog Timer Reset 33 32 30 31 34 I/O Pins 34 |
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