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APFCON 数据表(PDF) 32 Page - Microchip Technology

部件名 APFCON
功能描述  Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver
PDF  222 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

APFCON 数据表(HTML) 32 Page - Microchip Technology

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MCP19111
DS22331A-page 32
 2013 Microchip Technology Inc.
FIGURE 5-7:
A/D CONVERSION TIMING (NORMAL MODE)
TABLE 5-7:
MCP19111 A/D CONVERSION REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C
 T
A  +125°C
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
AD130*
TAD
A/D Clock Period
1.6
9.0
µs
TOSC-based, VREF 3.0V
3.0
9.0
µs
TOSC-based, VREF full range
A/D Internal RC Oscillator
Period
3.0
6.0
9.0
µs
ADCS<1:0> = 11 (ADRC mode)
At VDD = 2.5V
1.6
4.0
6.0
µs
At VDD = 5.0V
AD131
TCNV Conversion Time
(not including Acquisition
Time)(1)
—11—
TAD Set GO/DONE bit to new data in
A/D Result register
AD132*
TACQ Acquisition Time
11.5
µs
AD133*
TAMP Amplifier Settling Time
5
µs
AD134
TGO
Q4 to A/D Clock Start
TOSC/2
TOSC/
2+TCY
If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
*
These parameters are characterized but not tested.
Data in ‘Typ’ column is at VIN =12V (VDD = 5V), +25°C unless otherwise stated. These parameters are for
design guidance only and are not tested.
Note 1:
ADRESH and ADRESL registers may be read on the following TCY cycle.
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
98
7
3
2
1
0
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This
allows the SLEEP instruction to be executed.
1/2 TCY
6
134



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