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APFCON 数据表(PDF) 87 Page - Microchip Technology |
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APFCON 数据表(HTML) 87 Page - Microchip Technology |
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87 / 222 page  2013 Microchip Technology Inc. DS22331A-page 87 MCP19111 TABLE 14-3: INITIALIZATION CONDITION FOR REGISTERS Register Address Power-on Reset MCLR Reset WDT Reset Wake-up from Sleep through Interrupt Wake-up from Sleep through WDT Time-out W— xxxx xxxx uuuu uuuu uuuu uuuu INDF 00h/80h/ 100h/180h xxxx xxxx xxxx xxxx uuuu uuuu TMR0 01h/101h xxxx xxxx uuuu uuuu uuuu uuuu PCL 02h/82h/ 102h/182h 0000 0000 0000 0000 PC + 1(3) STATUS 03h/83h/ 103h/183h 0001 1xxx 000q quuu(4) uuuq quuu(4) FSR 04h/84h/ 104h/184h xxxx xxxx uuuu uuuu uuuu uuuu PORTGPA 05h xxxx xxxx uuuu uuuu uuuu uuuu PORTGPB 06h xxx- xxxx uuu- uuuu uuu- uuuu PIR1 07h -000 --00 -000 --00 -uuu --uu PIR2 08h 0-00 --00 0-00 --00 u-uu --uu PCON 09h ---- -qq- ---- -uu- ---- -uu- PCLATH 0Ah/8Ah/ 10Ah/18Ah ---0 0000 ---0 0000 ---u uuuu INTCON 0Bh/8Bh/ 10Bh/18Bh 0000 000x 0000 000u uuuu uuuu(2) TMR1L 0Ch xxxx xxxx uuuu uuuu uuuu uuuu TMR1H 0Dh xxxx xxxx uuuu uuuu uuuu uuuu T1CON 0Eh --00 --00 --uu --uu --uu --uu TMR2 0Fh 0000 0000 uuuu uuuu uuuu uuuu T2CON 10h ---- -000 ---- -000 ---- -uuu PR2 11h 1111 1111 1111 1111 uuuu uuuu PWMPHL 13h xxxx xxxx uuuu uuuu uuuu uuuu PWMPHH 14h xxxx xxxx uuuu uuuu uuuu uuuu PWMRL 15h xxxx xxxx uuuu uuuu uuuu uuuu PWMRH 16h xxxx xxxx uuuu uuuu uuuu uuuu OVCCON 19h 0000 0000 0000 0000 uuuu uuuu OVFCON 1Ah 0--0 0000 0--0 0000 u--u uuuu OSCTUNE 1Bh ---0 0000 ---0 0000 ---u uuuu ADRESL(1) 1Ch xxxx xxxx uuuu uuuu uuuu uuuu ADRESH(1) 1Dh ---- --xx ---- --uu ---- ---uu ADCON0(1) 1Eh -000 0000 -000 0000 -uuu uuuu ADCON1(1) 1Fh -000 ---- -000 ---- -uuu ---- OPTION_REG 81h/181h 1111 1111 1111 1111 uuuu uuuu TRISGPA 85h 1111 1111 1111 1111 uuuu uuuu TRISGPB 86h 1111 1111 1111 1111 uuuu uuuu Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition. Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently. 2: One or more bits in INTCON and/or PIRx will be affected (to cause wake-up). 3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 4: See Table 14-5 for Reset value for specific condition. |
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