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APFCON 数据表(PDF) 99 Page - Microchip Technology |
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APFCON 数据表(HTML) 99 Page - Microchip Technology |
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99 / 222 page  2013 Microchip Technology Inc. DS22331A-page 99 MCP19111 16.0 POWER-DOWN MODE (SLEEP) The Power-Down mode is entered by executing a SLEEP instruction. Upon entering Sleep mode, the following conditions exist: 1. WDT will be cleared but keeps running, if enabled for operation during Sleep. 2. PD bit of the STATUS register is cleared. 3. TO bit of the STATUS register is set. 4. CPU clock is not disabled. 5. Timer1 oscillator is unaffected, and peripherals that operate from it may continue operation in Sleep. 6. ADC is unaffected. 7. I/O ports maintain the status they had before SLEEP was executed (driving high, low or high-impedance). 8. Resets other than WDT are not affected by Sleep mode. 9. Analog circuitry is unaffected by execution of SLEEP instruction. Refer to individual chapters for more details on peripheral operation during Sleep. To minimize current consumption, the following conditions should be considered: • I/O pins should not be floating • External circuitry sinking current from I/O pins • Internal circuitry sourcing current from I/O pins • Current draw from pins with internal weak pull-ups • Modules using Timer1 oscillator I/O pins that are high-impedance inputs should be pulled to VDD or GND externally to avoid switching currents caused by floating inputs. The SLEEP instruction does not affect the analog circuitry. The enable state of the analog circuitry does not change with the execution of the SLEEP instruction. Examples of internal circuitry that might be sourcing current include modules, such as the DAC. See Section 22.0 “Analog-to-Digital Converter (ADC) Module” for more information on this module. 16.1 Wake-up from Sleep The device can wake-up from Sleep through one of the following events: 1. External Reset input on MCLR pin, if enabled 2. POR Reset 3. Watchdog Timer, if enabled 4. Any external interrupt 5. Interrupts by peripherals capable of running during Sleep (see individual peripheral for more information) The first two events will cause a device Reset. The last three events are considered a continuation of program execution. To determine whether a device Reset or wake-up event occurred, refer to Section 14.7 “Deter- mining the Cause of a Reset”. The following peripheral interrupts can wake the device from Sleep: 1. Timer1 interrupt. Timer1 must be operating as an asynchronous counter 2. A/D conversion 3. Interrupt-on-change 4. External Interrupt from INT pin When the SLEEP instruction is being executed, the next instruction (PC + 1) is prefetched. For the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be enabled. Wake-up will occur regardless of the state of the GIE bit. If the GIE bit is disabled, the device continues execution at the instruction after the SLEEP instruction. If the GIE bit is enabled, the device executes the instruction after the SLEEP instruction, the device will then call the Interrupt Service Routine. In cases where the execution of the instruction following SLEEP is not desirable, the user should have an NOP after the SLEEP instruction. The WDT is cleared when the device wakes up from Sleep, regardless of the source of wake-up. |
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