LSM330DLC datasheet(42/66 Pages) STMICROELECTRONICS

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LSM330DLC

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Doc ID 022162 Rev 2

The device contains a set of registers which are used to control its behavior and to retrieve

acceleration, angular rate and temperature data. The register addresses, made up of 7 bits,

are used to identify them and to write the data through the serial interface.

8.1

CTRL_REG1_A (20h)

ODR<3:0> is used to set the power mode and ODR selection. Table 21 below provides all

the frequencies resulting from the ODR<3:0> combinations.

Table 19.

CTRL_REG1_A register

ODR3

ODR2

ODR1

ODR0

LPen

Zen

Yen

Xen

Table 20.

CTRL_REG1_A description

ODR3-0

Data rate selection. Default value: 0

(0000: Power-down; Others: refer to Table 21, “Data rate configuration”)

LPen

Low power mode enable. Default value: 0

(0: Normal mode, 1: Low power mode)

Zen

Z axis enable. Default value: 1

(0: Z axis disabled; 1: Z axis enabled)

Yen

Y axis enable. Default value: 1

(0: Y axis disabled; 1: Y axis enabled)

Xen

X axis enable. Default value: 1

(0: X axis disabled; 1: X axis enabled)

Table 21.

Data rate configuration

ODR3

ODR2

ODR1

ODR0

Power mode selection

0000Power-down mode

0001Normal / Low power mode (1 Hz)

0010Normal / Low power mode (10 Hz)

0011Normal / Low power mode (25 Hz)

0100Normal / Low power mode (50 Hz)

0101Normal / Low power mode (100 Hz)

0110Normal / Low power mode (200 Hz)

0111Normal / Low power mode (400 Hz)

1000Low power mode (1.620 kHz)

1001Normal (1.344 kHz) / Low power mode (5.376 kHz)

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