ADE7953ACPZ datasheet(53/68 Pages) AD

53 / 68 page

Data Sheet

ADE7953

Rev. A | Page 53 of 68

I2C INTERFACE

The ADE7953 supports a fully licensed I2C interface. The I2C

interface operates as a slave and uses two shared pins: SDA and

SCL. The SDA pin is a bidirectional input/output pin, and the

SCL pin is the serial clock. Both pins are shared with the SPI

and UART interfaces. The I2C interface operates at a maximum

serial clock frequency of 400 kHz.

The two pins used for data transfer—SDA and SCL—are

configured in a wire-AND format that allows arbitration in

a multimaster system.

Communication via the I2C interface is initiated by the master

device generating a start condition. This consists of the master

transmitting a single byte containing the address of the slave

device and the nature of the operation (read or write).

The address of the ADE7953 is 0111000X. Bit 7 in the address

byte indicates whether a read or a write is required: 0 indicates a

write, and 1 indicates a read. The communication continues as

described in the following sections until the master issues a stop

condition and the bus returns to the idle condition.

I2C Write Operations

A write operation on the ADE7953 is initiated when the master

issues a start condition, which consists of the slave address and

the read/write bit. The start condition is followed by the 16-bit

address of the target register. After each byte is received, the

ADE7953 issues an acknowledge (ACK) to the master.

As soon as the 16-bit address communication is complete, the

master sends the register data, MSB first. The length of this data

can be 8, 16, 24, or 32 bits long. After each byte of register data

is received, the ADE7953 slave issues an acknowledge (ACK).

When transmission of the final byte is complete, the master

issues a stop condition, and the bus returns to the idle condition.

The I2C write operation is shown in Figure 70.

ACK GENERATED BY

ADE7953

SLAVE ADDRESS

MSB OF REGISTER ADDRESS

LSB OF REGISTER ADDRESS

BYTE 3 (MSB) OF REGISTER

BYTE 2 OF REGISTER

BYTE 1 OF REGISTER

BYTE 0 (LSB) OF REGISTER

111 0000

Figure 70. I2C Write

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