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PIC16LC771 数据表(PDF) 48 Page - Microchip Technology |
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PIC16LC771 数据表(HTML) 48 Page - Microchip Technology |
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48 / 224 page ![]() PIC16C717/770/771 DS41120C-page 48 1999-2013 Microchip Technology Inc. 6.1.1 TIMER1 COUNTER OPERATION In this mode, Timer1 is being incremented via an exter- nal source. Increments occur on a rising edge. After Timer1 is enabled in Counter mode, the module must first have a falling edge before the counter begins to increment. FIGURE 6-1: TIMER1 INCREMENTING EDGE FIGURE 6-2: TIMER1 BLOCK DIAGRAM T1CKI (Initially high) T1CKI (Initially low) Note: Arrows indicate counter increments. First falling edge of the T1ON enabled First falling edge of the T1ON enabled TMR1H TMR1L T1OSC T1SYNC TMR1CS T1CKPS<1:0> SLEEP input T1OSCEN Enable Oscillator(1) Fosc/4 Internal Clock TMR1ON on/off Prescaler 1, 2, 4, 8 Synchronize det 1 0 0 1 Synchronized clock input 2 RB6/T1OSO/T1CKI/P1C RB7/T1OSI/P1D Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain. Set flag bit TMR1IF on Overflow TMR1 |
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