LCMXO2-256ZE-3UMG64C datasheet(73/106 Pages) LATTICE

73 / 106 page

3-34

DC and Switching Characteristics

MachXO2 Family Data Sheet

Flash Download Time

1, 2

JTAG Port Timing Specifications

Symbol

Parameter

Device

Typ.

Units

tREFRESH

POR to Device I/O Active

LCMXO2-256

0.6

LCMXO2-640

1.0

LCMXO2-640U

1.9

LCMXO2-1200

1.9

LCMXO2-1200U

1.4

LCMXO2-2000

1.4

LCMXO2-2000U

2.4

LCMXO2-4000

2.4

LCMXO2-7000

3.8

1. Assumes sysMEM EBR initialized to an all zero pattern if they are used.

2. The Flash download time is measured starting from the maximum voltage of POR trip point.

Symbol

Parameter

Min.

Max.

Units

fMAX

TCK clock frequency

—

MHz

tBTCPH

TCK [BSCAN] clock pulse width high

—

tBTCPL

TCK [BSCAN] clock pulse width low

—

tBTS

TCK [BSCAN] setup time

—

tBTH

TCK [BSCAN] hold time

—

tBTCO

TAP controller falling edge of clock to valid output

—

tBTCODIS

TAP controller falling edge of clock to valid disable

—

tBTCOEN

TAP controller falling edge of clock to valid enable

—

tBTCRS

BSCAN test capture register setup time

—

tBTCRH

BSCAN test capture register hold time

—

tBUTCO

BSCAN test update register, falling edge of clock to valid output

—

tBTUODIS

BSCAN test update register, falling edge of clock to valid disable

—

tBTUPOEN

BSCAN test update register, falling edge of clock to valid enable

—

LCMXO2-256ZE-3UMG64C 数据表(PDF) 73 Page - Lattice Semiconductor

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