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ADP5063ACPZ-1-R7 数据表(PDF) 9 Page - Analog Devices

部件名 ADP5063ACPZ-1-R7
功能描述  Linear LiFePO4 Battery Charger with Power Path and USB Compatibility in LFCSP
PDF  44 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5063ACPZ-1-R7 数据表(HTML) 9 Page - Analog Devices

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Data Sheet
ADP5063
Rev. 0 | Page 9 of 44
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Name
Type1
Description
1
SCL
I
I2C-Compatible Interface Serial Clock.
2
DIG_IO3
GPIO
Charging Enable. When DIG_IO3 = low or high-Z, charging is disabled. When DIG_IO3 = high,
charging is enabled.2, 3
3
DIG_IO2
GPIO
Set Input Current Limit. When DIG_IO2 = low or high-Z, the input limit is defined by DIG_IO1
setting. When DIG_IO2 = high, the input limit is 1500 mA.2, 3
4
BAT_SNS
I
Battery Voltage Sense Pin.
5
DIG_IO1
GPIO
Set Input Current Limit. This pin sets the input current limit directly. When DIG_IO1 = low or
high-Z, the input limit is 100 mA. When DIG_IO1 = high, the input limit is 500 mA.2, 3
6, 7, 8
VIN1, VIN2, VIN3
I/O
Power Connections to USB VBUS. These pins are high current inputs when in charging mode.
9, 10, 11
ISO_S1, ISO_S2,
ISO_S3
I/O
Linear Charger Supply Side Input to Internal Isolation FET/Battery Current Regulation FET. High
current input/output.
12, 13, 14
ISO_B1, ISO_B2,
ISO_B3
I/O
Battery Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
15
ILED
O
Open-Drain Output to Indicator LED.
16
SYS_EN
O
System Enable. This pin is the battery OK flag/open-drain pull-down FET to enable the system
when the battery reaches the VWEAK level.
17
SDA
I/O
I2C-Compatible Interface Serial Data.
18
THR
I
Battery Pack Thermistor Connection. If this pin is not used, connect a dummy 10 kΩ resistor from
THR to AGND.
19
CBP
I/O
Bypass Capacitor Input.
20
AGND
G
Analog Ground.
N/A4
EP
N/A4
Exposed Pad. Connection of the exposed pad is not required. The exposed pad can be connected
to analog ground to improve heat dissipation from the package to the board.
1
I is input, O is output, I/O is input/output, G is ground, and GPIO is the factory programmable general-purpose input/output.
2
See the Digital Input and Output Options section for details.
3
The DIG_IOx setting defines the initial state of the ADP5063. If the parameter or the mode that is related to each DIG_IOx pin setting is changed (by programming an
equivalent I2C register bit or bits), the I2C register setting takes precedence over the DIG_IOx pin setting. VINx connection or disconnection resets control to the
DIG_IOx pin.
4
N/A = not applicable.
1
SCL
2
DIG_IO3
3
DIG_IO2
4
BAT_SNS
5
DIG_IO1
13 ISO_B2
14 ISO_B3
15 ILED
12 ISO_B1
11 ISO_S3
NOTES
1. CONNECTION OF THE EXPOSED PAD IS NOT REQUIRED. THE
EXPOSED PAD CAN BE CONNECTED TO ANALOG GROUND TO
IMPROVE HEAT DISSIPATION FROM THE PACKAGE TO BOARD.
ADP5063
TOP VIEW
(Not to Scale)



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