数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADP5063ACPZ-1-R7 数据表(PDF) 19 Page - Analog Devices

部件名 ADP5063ACPZ-1-R7
功能描述  Linear LiFePO4 Battery Charger with Power Path and USB Compatibility in LFCSP
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5063ACPZ-1-R7 数据表(HTML) 19 Page - Analog Devices

Back Button ADP5063ACPZ-1-R7 Datasheet HTML 15Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 16Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 17Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 18Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 19Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 20Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 21Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 22Page - Analog Devices ADP5063ACPZ-1-R7 Datasheet HTML 23Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 44 page
background image
Data Sheet
ADP5063
Rev. 0 | Page 19 of 44
Trickle Charge Mode
A deeply discharged Li-Ion cell can exhibit a very low cell voltage,
making it unsafe to charge the cell at high current rates. The
ADP5063 charger uses a trickle charge mode to reset the battery
pack protection circuit and lift the cell voltage to a safe level for
fast charging. A cell with a voltage below VTRK_DEAD is charged
with the trickle mode current, ITRK_DEAD. During trickle charging
mode, the CHARGER_STATUS[2:0] bits are set.
During trickle charging, the ISO_Sx node is regulated to VISO_STRK
by the LDO and the battery isolation FET is off, which means
that the battery is isolated from the system power supply.
Trickle Charge Mode Timer
The duration of trickle charge mode is monitored to ensure that the
battery is revived from its deeply discharged state. If trickle charge
mode runs for longer than 60 minutes without the cell voltage
reaching VTRK_DEAD, a fault condition is assumed and charging stops.
The fault condition is asserted on the CHARGER_STATUS[2:0]
bits, allowing the user to initiate the fault recovery procedure
specified in the Fault Recovery section.
Weak Charge Mode (Constant Current)
When the battery voltage exceeds VTRK_DEAD but is less than
VWEAK, the charger switches to intermediate charge mode.
During the weak charge mode, the battery voltage is too low to
allow the full system to power up. Because of the low battery
level, the USB transceiver cannot be powered and, therefore,
cannot enumerate for more current from a USB host. Conse-
quently, the USB limit remains at 100 mA.
The system microcontroller may or may not be powered by the
charger output voltage (VISO_SFC), depending upon the amount
of current that the microcontroller and/or the system architecture
requires. When the ISO_Sx pins power the microcontroller, the
battery charge current (ICHG_WEAK) cannot be increased above
20 mA to ensure microcontroller operation (if doing so), nor
can ICHG_WEAK be increased above the 100 mA USB limit. There-
fore, set the battery charging current as follows:
Set the default 20 mA via the linear trickle charger branch (to
ensure that the microprocessor remains alive if powered by
the main charger output, ISO_Sx). Any residual current on
the main charger output, ISO_Sx, is used to charge the battery.
During weak current mode, other features may prevent the
weak charging current from reaching its full programmed
value. Isothermal charging mode or input current limiting
for USB compatibility can affect the programmed weak
charging current value under certain operating conditions.
During weak charging, the ISO_Sx node is regulated to
VISO_SFC by the battery isolation FET.
Fast Charge Mode (Constant Current)
When the battery voltage exceeds VTRK_DEAD and VWEAK, the charger
switches to fast charge mode, charging the battery with the constant
current, ICHG. During fast charge mode (constant current), the
CHARGER_STATUS[2:0] bits are set to 010.
During constant current mode, other features may prevent the
current, ICHG, from reaching its full programmed value. Isothermal
charging mode or input current limiting for USB compatibility
can affect the value of ICHG under certain operating conditions.
The voltage on ISO_Sx is regulated to stay at VISO_SFC by the
battery isolation FET when VISO_Bx < VISO_SFC.
Fast Charge Mode (Constant Voltage)
As the battery charges, its voltage rises and approaches the termi-
nation voltage, VTRM. The ADP5063 charger monitors the voltage
on the BAT_SNS pin to determine when charging should end.
However, the internal ESR of the battery pack combined with the
printed circuit board (PCB) and other parasitic series resis-
tances creates a voltage drop between the sense point at the
BAT_SNS pin and the cell terminal. To compensate for this
and to ensure a fully charged cell, the ADP5063 enters a constant
voltage charging mode when the termination voltage is detected
on the BAT_SNS pin. The ADP5063 reduces charge current
gradually as the cell continues to charge, maintaining a voltage of
VTRM on the BAT_SNS pin. During fast charge mode (constant
voltage), the CHARGER_ STATUS bits are set to 011.
Fast Charge Mode Timer
The duration of fast charge mode is monitored to ensure that
the battery is charging correctly. If the fast charge mode runs
for longer than tCHG without the voltage at the BAT_SNS pin
reaching VTRM, a fault condition is assumed and charging stops.
The fault condition is asserted on the CHARGER_STATUS[2:0]
bits, allowing the user to initiate the fault recovery procedure as
specified in the Fault Recovery section.
If the fast charge mode runs for longer than tCHG, and VTRM has
been reached on the BAT_SNS pin but the charge current has
not yet fallen below IEND, charging stops. No fault condition is
asserted in this circumstance, and charging resumes as normal
if the recharge threshold is breached.
Watchdog Timer
The ADP5063 charger features a programmable watchdog timer
function to ensure that charging is under the control of the pro-
cessor. The watchdog timer starts running when the ADP5063
charger determines that the processor should be operational,
that is, when the processor sets the RESET_WD bit for the first
time or when the battery voltage is greater than the weak battery
threshold, VWEAK. When the watchdog timer has been triggered,
it must be reset regularly within the watchdog timer period, tWD.
While in charger mode, if the watchdog timer expires without
being reset, the ADP5063 charger assumes that there is a software
problem and triggers the safety timer, tSAFE. For more information
see the Safety Timer section.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com