ADP5063ACPZ-1-R7 datasheet(20/44 Pages) AD

20 / 44 page

ADP5063

Data Sheet

Rev. 0 | Page 20 of 44

Safety Timer

While in charger mode, if the watchdog timer expires, the

ADP5063 charger initiates the safety timer, tSAFE (see the

Watchdog Timer section). If the processor has programmed

charging parameters by the time the charger initiates the safety

timer, ILIM is set to the default value. Charging continues for a

period of tSAFE, and then the charger switches off and sets the

CHARGER_STATUS[2:0] bits.

Charge Complete

The ADP5063 charger monitors the charging current while in

fast charge constant voltage mode. If the current falls below IEND

and remains below IEND for tEND, charging stops and the CHDONE

flag is set. If the charging current falls below IEND for less than

tEND and then rises above IEND again, the tEND timer resets.

Recharge

After the detection of charge complete and the cessation of

charging, the ADP5063 charger monitors the BAT_SNS pin as

the battery discharges through normal use. If the BAT_SNS pin

voltage falls to VRCH, the charger reactivates charging. Under most

circumstances, triggering the recharge threshold results in the

charger starting directly in fast charge constant voltage mode.

The recharge function can be disabled in the I2C interface, but a

status bit (Register Address 0x0C, Bit 3) informs the system that

a recharge cycle is required.

IC Enable/Disable

The ADP5063 IC can be disabled by the DIG_IO2 digital input

pin (if factory programmed to do so) or by the I2C registers. All

internal control circuits are disabled when the IC is disabled. Dis-

abling the IC1 option can also control the states of the LDO FET

and the battery isolation FET.

It is critical to note that during the disable IC1 mode, a high voltage

at VINx passes to the internal supply voltage because all of the

internal control circuits are disabled. The VINx supply voltage

must fulfill the following condition:

VISO_Bx < VINx < 5.5 V

Battery Charging Enable/Disable

The ADP5063 charging function can be disabled by setting the

I2C EN_CHG bit to low. The LDO to the system still operates

under this circumstance and can be set in I2C to the default or

I2C programmed system voltage from 4.3 V to 5.0 V (see Table 26

for details).

The ADP5063 charging function can also be controlled via one

of the external DIG_IOx pins (if factory programmed to do so).

Any change in the I2C EN_CHG bit takes precedence over the

pin setting.

Battery Voltage Limit to Prevent Charging

The battery monitor of the ADP5063 charger can be configured

to monitor battery voltage and prevent charging when the battery

voltage is higher than VCHG_VLIM (typically 3.2 V) during charging

start-up (enabled by EN_CHG or DIG_IO3). This function can

prevent unnecessary charging of a half discharged battery and,

as such, can extend the lifetime of the Li-Ion battery cell. Charging

starts automatically when the battery voltage drops below VCHG_VLIM

and continues through full charge cycle until the battery voltage

reaches VTRM (typically 3.6 V).

By default, the charging voltage limit is disabled, and it can be

enabled via I2C Register Address 0x08, Bit 5 (EN_CHG_VLIM).

SYS_EN Output

The ADP5063 features a SYS_EN open-drain FET to enable the

system until the battery is at the minimum required level for

guaranteed system startup. When there are minimum battery

voltage and/or minimum battery charge level requirements, the

operation of SYS_EN can be set by I2C programming. The SYS_EN

operation can be factory programmed to four different operating

conditions, as described in Table 11.

Table 11. SYS_EN Mode Descriptions

SYS_EN Mode

Selection

Description

SYS_EN is activated when LDO is active and

system voltage is available.

SYS_EN is activated by the ISO_Bx voltage, the

battery charging mode.

SYS_EN is activated and the isolation FET is

disabled when the battery drops below VWEAK.

This option is active when VINx = 0 V and the

battery monitor is activated from Register 0x07,

Bit 5 (EN_BMON).

SYS_EN is active in LDO mode when the charger

is disabled.

SYS_EN is active in charging mode when

VISO_Bx ≥ VWEAK.

Indicator LED Output (ILED)

The ILED is an open-drain output for an indicator LED connec-

tion. Optionally, the ILED output can be used as a status output

for a microcontroller. Indicator LED modes are listed in Table 12.

Table 12. Indicator LED Operation Modes

ADP5063 Mode

ILED Mode

On/Off Time

IC Off

Off

LDO Mode Off

Off

LDO Mode On

Off

Charge Mode

Continuously on

Timer Error (tTRK, tCHG, tSAFE)

Blinking

167 ms/833 ms

Overtemperature (TSD)

Blinking

1 sec/1 sec

ADP5063ACPZ-1-R7 数据表(PDF) 20 Page - Analog Devices

ADP5063ACPZ-1-R7 数据表(HTML) 20 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

数据表下载