OP296 datasheet(35/88 Pages) AD

35 / 88 page

ADuC841/ADuC842/ADuC843

Rev. 0 | Page 35 of 88

Example: Programming the Flash/EE Data Memory

A user wants to program F3H into the second byte on Page 03H

of the Flash/EE data memory space while preserving the other

3 bytes already in this page. A typical program of the Flash/EE

data array involves

Setting EADRH/L with the page address.

Writing the data to be programmed to the EDATA1–4.

Writing the ECON SFR with the appropriate command.

Step 1: Set Up the Page Address

Address registers EADRH and EADRL hold the high byte

address and the low byte address of the page to be addressed.

The assembly language to set up the address may appear as

MOV EADRH,#0

; Set Page Address Pointer

MOV EADRL,#03H

Step 2: Set Up the EDATA Registers

Write the four values to be written into the page into the four

SFRs, EDATA1–4. Unfortunately, the user does not know three

of them. Thus, the user must read the current page and over-

write the second byte.

MOV ECON,#1

; Read Page into EDATA1-4

MOV EDATA2,#0F3H

; Overwrite byte 2

Step 3: Program Page

A byte in the Flash/EE array can be programmed only if it has

previously been erased. To be more specific, a byte can be

programmed only if it already holds the value FFH. Because of

the Flash/EE architecture, this erase must happen at a page level;

therefore, a minimum of 4 bytes (1 page) are erased when an

erase command is initiated. Once the page is erase, the user can

program the 4 bytes in-page and then perform a verification of

the data.

MOV ECON,#5

; ERASE Page

MOV ECON,#2

; WRITE Page

MOV ECON,#4

; VERIFY Page

MOV A,ECON

; Check if ECON=0 (OK!)

JNZ ERROR

Although the 4 kBytes of Flash/EE data memory are shipped

from the factory pre-erased, i.e., byte locations set to FFH, it is

nonetheless good programming practice to include an

ERASEALL routine as part of any configuration/setup code

running on the parts. An ERASEALL command consists of

writing 06H to the ECON SFR, which initiates an erase of the

4-kByte Flash/EE array. This command coded in 8051 assembly

would appear as

MOV ECON,#06H

; Erase all Command

; 2 ms Duration

Flash/EE Memory Timing

Typical program and erase times for the parts are as follows:

Normal Mode (operating on Flash/EE data memory)

READPAGE (4 bytes)

22 machine cycles

WRITEPAGE (4 bytes)

380 µs

VERIFYPAGE (4 bytes)

22 machine cycles

ERASEPAGE (4 bytes)

2 ms

ERASEALL (4 kBytes)

2 ms

READBYTE (1 byte)

9 machine cycles

WRITEBYTE (1 byte)

200 µs

ULOAD Mode (operating on Flash/EE program memory)

WRITEPAGE (256 bytes)

16.5 ms

ERASEPAGE (64 bytes)

2 ms

ERASEALL (56 kBytes)

2 ms

WRITEBYTE (1 byte)

200 µs

Note that a given mode of operation is initiated as soon as the

command word is written to the ECON SFR. The core micro-

controller operation on the parts is idled until the requested

program/read or erase mode is completed. In practice, this

means that even though the Flash/EE memory mode of operation

is typically initiated with a two machine cycle MOV instruction

(to write to the ECON SFR), the next instruction is not executed

until the Flash/EE operation is complete. This means that the

core cannot respond to interrupt requests until the Flash/EE

operation is complete, although the core peripheral functions

like counter/timers continue to count and time as configured

throughout this period.

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