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AD6620S/PCB 数据表(PDF) 22 Page - Analog Devices

部件名 AD6620S/PCB
功能描述  67 MSPS Digital Receive Signal Processor
PDF  44 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6620S/PCB 数据表(HTML) 22 Page - Analog Devices

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AD6620
–22–
REV. A
S
ceil
M
input
level
OL
input
level
CIC
CIC
CIC
SCIC
22
2
2
2
1
2
2
log (
_
)
_
The equations for calculating CIC2 output level is correct when
stage is not bypassed (normal operation). However, when by-
passed, the following equations should be used instead.
OLCIC2 = Input Level
The gain and pass band droop of the CIC2 should be calculated
by the equations above, as well as the filter transfer equations
that follow. If these are unacceptable, they can be compensated
for in subsequent stages.
CIC2 Rejection
The table below illustrates the amount of bandwidth in percent
of the data rate into the CIC2 stage. The data in this table may
be scaled to any allowable sample rate up to 67 MHz in Single
Channel Mode or 33.5 MHz in Diversity Channel Mode. The
table can be used as a tool to decide how to distribute the deci-
mation between CIC2, CIC5 and the RCF.
The data in this table may be scaled to any allowable sample
rate up to 67 MHz in Single Channel Mode or 33.5 MHz in
Diversity Channel Mode.
Table III. SSB CIC2 Alias Rejection Table (fSAMP = 1)
Bandwidth Shown in Percentage of fSAMP
MCIC2
–50 dB –60 dB
–70 dB
–80 dB –90 dB
–100 dB
2
1.79
1.007
0.566
0.318
0.179
0.101
3
1.508
0.858
0.486
0.274
0.155
0.087
4
1.217
0.696
0.395
0.223
0.126
0.071
5
1.006
0.577
0.328
0.186
0.105
0.059
6
0.853
0.49
0.279
0.158
0.089
0.05
7
0.739
0.425
0.242
0.137
0.077
0.044
8
0.651
0.374
0.213
0.121
0.068
0.038
9
0.581
0.334
0.19
0.108
0.061
0.034
10
0.525
0.302
0.172
0.097
0.055
0.031
11
0.478
0.275
0.157
0.089
0.05
0.028
12
0.439
0.253
0.144
0.082
0.046
0.026
13
0.406
0.234
0.133
0.075
0.043
0.024
14
0.378
0.217
0.124
0.07
0.04
0.022
15
0.353
0.203
0.116
0.066
0.037
0.021
16
0.331
0.19
0.109
0.061
0.035
0.02
Example Calculations
Goal: Implement a filter with an Input Sample Rate of 10 MHz
requiring 100 dB of Alias Rejection for a
±7 kHz pass band.
Solution: First determine the percentage of the sample rate that
is represented by the pass band.
BW
kHz
MHz
FRACTION
=
100
7
10
007
.%
Find the –100 dB column on the right of the table and look
down this column for a value greater than or equal to your
pass band percentage of the clock rate. Then look across to the
extreme left column and find the corresponding decimation
rate. Referring to the table, notice that for a decimation of 4, the
frequency having –100 dB of alias rejection is 0.071 percent
which is slightly greater than the 0.07 percent calculated. There-
fore, the maximum bound on CIC2 decimation for this condi-
tion is four. Additional decimation means less alias rejection
than the 100 dB required.
Note that although an MCIC2 less then four would still yield the
required rejection, overall power consumption is reduced by
decimating as much as possible in this stage. Decimation in
CIC2 lowers the data rate and thus reduces power consumed in
subsequent stages.
The plot below shows the CIC2 transfer function using a deci-
mation of four. The first plot is referenced to the input sample
rate, the complex spectrum from –fSAMP/2 to fSAMP/2. The sec-
ond plot is referenced to the CIC2 output rate, the complex
spectrum from –fSAMP2/2 to fSAMP2/2. The aliases of the CIC2
can be seen to be “folding back” in toward the edge of the
desired filter pass band. It is the level of these aliases as they
move into the desired pass band that are important.
–0.5
–120
–100
–80
–60
–40
–20
0
f/fSAMP
–0.4 –0.3
–0.2
–0.1
0.1
0.2
0.3
0.4
0.5
0
–0.5
–120
–100
–80
–60
–40
–20
0
f/fSAMP2
–0.4 –0.3
–0.2
–0.1
0.1
0.2
0.3
0.4
0.5
0
Figure 36. CIC2 Alias Rejection, MCIC2 = 4
The set of plots below show a decimation of 16 in the CIC2
filter. The lobes of the filter drop as the decimation rate
increases, but the amplitudes of the aliased frequencies increase
because the output rate has been reduced.



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