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AD9512UCPZ-EP-R7 数据表(PDF) 17 Page - Analog Devices |
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AD9512UCPZ-EP-R7 数据表(HTML) 17 Page - Analog Devices |
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17 / 20 page  Enhanced Product AD9512-EP Rev. 0 | Page 17 of 20 Figure 13. Additive Phase Noise—LVPECL DIV1, 245.76 MHz Distribution Section Only Figure 14. Additive Phase Noise—LVDS DIV1, 245.76 MHz Figure 15. Additive Phase Noise—CMOS DIV1, 245.76 MHz Figure 16. Additive Phase Noise—LVPECL DIV1, 622.08 MHz Figure 17. Additive Phase Noise—LVDS DIV2, 122.88 MHz Figure 18. Additive Phase Noise—CMOS DIV4, 61.44 MHz OFFSET (Hz) 10 10M 1M 100k 10k 1k 100 –170 –110 –130 –120 –140 –150 –160 OFFSET (Hz) 10 10M 1M 100k 10k 1k 100 –170 –80 –90 –110 –100 –120 –130 –140 –150 –160 OFFSET (Hz) 10 10M 1M 100k 10k 1k 100 –170 –100 –110 –120 –130 –140 –150 –160 OFFSET (Hz) 10 10M 1M 100k 10k 1k 100 –170 –110 –130 –120 –140 –150 –160 OFFSET (Hz) 10 10M 1M 100k 10k 1k 100 –170 –80 –90 –110 –100 –120 –130 –140 –150 –160 OFFSET (Hz) 10 10M 1M 100k 10k 1k 100 –170 –100 –110 –120 –130 –140 –150 –160 |
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