Data Sheet

ADE7912/ADE7913

Rev. 0 | Page 41 of 44

REGISTER LIST

In Table 13 to Table 20, R means a register can be read, and W means a register can be written. U means an unsigned register, and S

means a signed register in twos complement format.

Table 13. Register List

Address

Register Name

R/W

Bit

Length

Type

Default

Value

Description

0x0

IWV

R

24

S

0x000000

Instantaneous value of Current I.

0x1

V1WV

R

24

S

0x000000

Instantaneous value of Voltage V1.

0x2

V2WV

R

24

S

0x000000

Instantaneous value of Voltage V2.

0x3

Reserved

R

24

S

0x000000

Reserved. This location always reads 0x000000.

0x4

ADC_CRC

R

16

U

N/A

CRC value of IWV, V1WV, and V2WV registers. See the ADC

Output Values CRC section for details.

0x5

CTRL_CRC

R

16

U

N/A

CRC value of configuration registers. See the CRC of

Configuration Registers for details.

0x6

Reserved

R

16

S

0x0000

Reserved. This location always reads 0x0000.

0x7

CNT_SNAPSHOT

R

16

U

0x00

Snapshot value of the counter used in synchronization operation.

See Table 14 and the Synchronizing Multiple ADE7912/ADE7913

Devices section for details.

0x8

CONFIG

R/W

8

U

0

Configuration register. See Table 15 for details.

0x9

STATUS0

R

8

U

0x01

Status register. See Table 16 for details.

0xA

Lock

W

8

U

0x00

Memory protection register. See the Protecting the Integrity

of Configuration Registers section and Table 17 for details.

0xB

SYNC_SNAP

W

8

U

0x00

Synchronization register. See Table 18 for details.

0xC

COUNTER0

R/W

8

U

N/A

Contains the least significant eight bits of the internal

synchronization counter.

0xD

COUNTER1

R/W

8

U

N/A

COUNTER1[3:0] bits contain the most significant four bits of

the internal synchronization counter. See the Synchronizing

Multiple ADE7912/ADE7913 Devices section for details.

0xE

EMI_CTRL

R/W

8

U

0xFF

EMI control register. Manages the PWM control block of the

isolated dc-to-dc converter to reduce EMI emissions (see

Table 19 and the DC-to-DC Converter section for details).

0xF

STATUS1

R

8

U

0x00

Status register. See Table 20 for details.

0x10, 0x11

Reserved

R/W

8

U

0x00

For proper operation, do not write to these registers.

0x12, 0x13

Reserved

R

8

U

0x00

Reserved registers.

0x14

Reserved

No functionality assigned at this address.

0x15, 0x16,

0x17

Reserved

R

8

U

0x00

Reserved registers.

0x18

TEMPOS

R

8

S

N/A

Temperature sensor offset. See the Temperature Sensor

section for more information.

Table 14. CNT_SNAPSHOT Register (Address 0x7)

Bit Location

Bit Name

Default Value

Description

11:0

Counter

0x000

Snapshot value of the counter used in synchronization operation.

15:12

Reserved

0000

Reserved. These bits do not represent any functionality.