TAS5731MPHPR datasheet(47/68 Pages) TI1

47 / 68 page

TAS5731M

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SLOS838B – JULY 2013 – REVISED NOVEMBER 2013

ERROR STATUS REGISTER (0x02)

The error bits are sticky and are not cleared by the hardware. This means that the software must clear the

Error Definitions:

•

MCLK Error : MCLK frequency is changing. The number of MCLKs per LRCLK is changing.

•

SCLK Error: The number of SCLKs per LRCLK is changing.

•

LRCLK Error: LRCLK frequency is changing.

•

Frame Slip: LRCLK phase is drifting with respect to internal Frame Sync.

Table 6. Error Status Register (0x02)

FUNCTION

–

MCLK error

–

PLL autolock error

–

SCLK error

–

LRCLK error

–

Frame slip

–

Clip indicator

–

Overcurrent, overtemperature, or undervoltage errors

–

Reserved

–

No errors (1)

(1)

Default values are in bold.

SYSTEM CONTROL REGISTER 1 (0x03)

The system control register 1 has several functions:

Bit D7:

If 0, the dc-blocking filter for each channel is disabled.

If 1, the dc-blocking filter (–3 dB cutoff <1 Hz) for each channel is enabled (default).

Bit D5:

If 0, use soft unmute on recovery from clock error. This is a slow recovery. Unmute takes the

same time as the volume ramp defined in register 0x0E.

If 1, use hard unmute on recovery from clock error (default). This is a fast recovery, a single step

volume ramp

Bits D1–D0: Select de-emphasis

Table 7. System Control Register 1 (0x03)

FUNCTION

–

PWM high-pass (dc blocking) disabled

–

PWM high-pass (dc blocking) enabled (1)

–

Reserved (1)

–

Soft unmute on recovery from clock error

–

Hard unmute on recovery from clock error (1)

–

Reserved (1)

–

Reserved (1)

–

Reserved(1)

–

No de-emphasis (1)

–

De-emphasis for fS = 32 kHz

–

De-emphasis for fS = 44.1 kHz

–

De-emphasis for fS = 48 kHz

(1)

Default values are in bold.

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