AGLP030 datasheet(129/134 Pages) MICROSEMI

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IGLOO PLUS Low Power Flash FPGAs

Revision 16

5-3

Revision 11

(continued)

Table 2-2 • Recommended Operating Conditions1,2 was revised. 1.2 V DC wide

range supply voltage and 3.3 V wide range supply voltage (SAR 26270) were added

for VCCI. VJTAG DC Voltage was revised (SAR 24052). The value range for VPUMP

programming voltage for operation was changed from "0 to 3.45" to "0 to 3.6" (SAR

25220).

2-2

Table 2-6 • Temperature and Voltage Derating Factors for Timing Delays (normalized

to TJ = 70°C, VCC = 1.425 V) and Table 2-7 • Temperature and Voltage Derating

Factors for Timing Delays (normalized to TJ = 70°C, VCC = 1.14 V) were revised.

2-6, 2-7

Table 2-8 • Power Supply State per Mode is new.

2-7

The tables in the "Quiescent Supply Current" section were updated (SARs 24882

and 24112). Some of the table notes were changed or deleted.

2-7

VIH maximum values in tables were updated as needed to 3.6 V (SARs 20990,

79370).

N/A

The values in the following tables were updated. 3.3 V LVCMOS and 1.2 V LVCMOS

wide range were added to the tables where applicable.

Table 2-13 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software

Settings

Table 2-14 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software

Settings1

Table 2-21 • Summary of Maximum and Minimum DC Input and Output Levels

Applicable to Commercial and Industrial Conditions—Software Default Settings

Table 2-22 • Summary of Maximum and Minimum DC Input Levels

Table 2-23 • Summary of AC Measuring Points

Table 2-25 • Summary of I/O Timing Characteristics—Software Default Settings,

STD Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC =

1.425 V, Worst-Case VCCI = 3.0 V

Table 2-26 • Summary of I/O Timing Characteristics—Software Default Settings,

STD Speed Grade Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC =

1.14 V, Worst-Case VCCI = 3.0 V

Table 2-28 • I/O Output Buffer Maximum Resistances 1

2-9

2-19

2-20

2-21

2-22

2-23

2-24

A table note was added to Table 2-16 • Different Components Contributing to the

Static Power Consumption in IGLOO PLUS Devices and Table 2-18 • Different

Components Contributing to the Static Power Consumption in IGLOO PLUS Devices

stating the value for PDC4 is the minimum contribution of the PLL when operating at

lowest frequency.

2-11,

2-12

Table 2-29 • I/O Weak Pull-Up/Pull-Down Resistances was revised, including

addition of 3.3 V and 1.2 V LVCMOS wide range.

The notes defining RWEAK PULL-UP-MAX and RWEAK PULLDOWN-MAX were revised

(SAR 21348).

2-25

Table 2-30 • I/O Short Currents IOSH/IOSL was revised to include data for 3.3 V and

1.2 V LVCMOS wide range (SAR 79353 and SAR 79366).

2-25

Table 2-31 • Duration of Short Circuit Event before Failure was revised to change the

maximum temperature from 110°C to 100°C, with an example of six months instead

of three months (SAR 26259).

2-26

Revision

Changes

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