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AGLP030 数据表(PDF) 131 Page - Microsemi Corporation |
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AGLP030 数据表(HTML) 131 Page - Microsemi Corporation |
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131 / 134 page ![]() IGLOO PLUS Low Power Flash FPGAs Revision 16 5-5 Revision Changes Page Revision 10 (Apr 2009) Product Brief v1.5 DC and Switching Characteristics Advance v0.5 The –F speed grade is no longer offered for IGLOO PLUS devices. References to it have been removed from the document. The speed grade column and note regarding –F speed grade were removed from "IGLOO PLUS Ordering Information". The "Speed Grade and Temperature Grade Matrix" section was removed. III, IV Revision 9 (Feb 2009) Product Brief v1.4 The "Advanced I/O" section was revised to add two bullets regarding support of wide range power supply voltage. I The "I/Os with Advanced I/O Standards" section was revised to add 3.0 V wide range to the list of supported voltages. The "Wide Range I/O Support" section is new. 1-7 Revision 8 (Jan 2009) Packaging v1.5 The "CS201" pin table was revised to add a note regarding pins G1 and H1. 4-8 Revision 7 (Dec 2008) Product Brief v1.3 A note was added to IGLOO PLUS Devices: "AGLP060 in CS201 does not support the PLL." I Table 2 • IGLOO PLUS FPGAs Package Size Dimensions was updated to change the nominal size of VQ176 from 100 to 400 mm2. II Revision 6 (Oct 2008) DC and Switching Characteristics Advance v0.4 Data was revised significantly in the following tables: Table 2-25 • Summary of I/O Timing Characteristics—Software Default Settings, STD Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V Table 2-26 • Summary of I/O Timing Characteristics—Software Default Settings, STD Speed Grade Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 3.0 V Table 2-50 • 2.5 LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage Table 2-51 • 2.5 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage 2-22, 2-33 Revision 5 (Aug 2008) Product Brief v1.2 The VQ128 and VQ176 packages were added to Table 1 • IGLOO PLUS Product Family, the "I/Os Per Package 1" table, Table 2 • IGLOO PLUS FPGAs Package Size Dimensions, "IGLOO PLUS Ordering Information", and the "Temperature Grade Offerings" table. I to IV Packaging v1.4 The "VQ128" package drawing and pin table are new. 4-2 The "VQ176" package drawing and pin table are new. 4-5 Revision 4 (Jul 2008) Product Brief v1.1 DC and Switching Characteristics Advance v0.3 As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to 1.5 V. N/A Revision 3 (Jun 2008) DC and Switching Characteristics Advance v0.2 Tables have been updated to reflect default values in the software. The default I/O capacitance is 5 pF. Tables have been updated to include the LVCMOS 1.2 V I/O set. N/A Table note 3 was updated in Table 2-2 • Recommended Operating Conditions1,2 to add the sentence, "VCCI should be at the same voltage within a given I/O bank." References to table notes 5, 6, 7, and 8 were added. Reference to table note 3 was removed from VPUMP Operation and placed next to VCC. 2-2 Table 2-4 • Overshoot and Undershoot Limits 1 was revised to remove "as measured on quiet I/Os" from the title. Table note 2 was revised to remove "estimated SSO density over cycles." Table note 3 was deleted. 2-3 |
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