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STM32F207IE 数据表(PDF) 109 Page - STMicroelectronics |
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STM32F207IE 数据表(HTML) 109 Page - STMicroelectronics |
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109 / 163 page  STM32F205xx, STM32F207xx Electrical characteristics Doc ID 15818 Rev 7 109/163 5.3.20 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 61 are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table 10. Table 61. ADC characteristics(1) Symbol Parameter Conditions Min Typ Max Unit VDDA Power supply 1.8(2) -3.6 V VREF+ Positive reference voltage 1.8(2)(3) -VDDA V fADC ADC clock frequency VDDA = 1.8 (2) to 2.4 V 0.6 - 15 MHz VDDA = 2.4 to 3.6 V 0.6 - 30 MHz fTRIG (4) External trigger frequency fADC = 30 MHz - - 823 kHz -- 17 1/fADC VAIN Conversion voltage range(5) 0 (VSSA or VREF- tied to ground) -VREF+ V RAIN (4) External input impedance See Equation 1 for details -- 50 k Ω RADC (4)(6) Sampling switch resistance 1.5 - 6 k Ω CADC (4) Internal sample and hold capacitor 4- TBD pF tlat (4) Injection trigger conversion latency fADC = 30 MHz - - 0.100 µs -- 3(7) 1/fADC tlatr (4) Regular trigger conversion latency fADC = 30 MHz - - 0.067 µs -- 2(7) 1/fADC tS (4) Sampling time fADC = 30 MHz 0.100 - 16 µs 3 - 480 1/fADC tSTAB (4) Power-up time - 2 3 µs tCONV (4) Total conversion time (including sampling time) fADC = 30 MHz 12-bit resolution 0.5 - 16.40 µs fADC = 30 MHz 10-bit resolution 0.43 - 16.34 µs fADC = 30 MHz 8-bit resolution 0.37 - 16.27 µs fADC = 30 MHz 6-bit resolution 0.3 - 16.20 µs 9 to 492 (tS for sampling +n-bit resolution for successive approximation) 1/fADC |
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