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MPC8347ECVRADDB 数据表(PDF) 22 Page - Freescale Semiconductor, Inc |
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MPC8347ECVRADDB 数据表(HTML) 22 Page - Freescale Semiconductor, Inc |
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22 / 99 page ![]() MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12 22 Freescale Semiconductor DUART Figure 7 shows the DDR SDRAM output timing diagram. Figure 7. DDR SDRAM Output Timing Diagram Figure 8 provides the AC test load for the DDR bus. Figure 8. DDR AC Test Load 7DUART This section describes the DC and AC electrical specifications for the DUART interface of the MPC8347EA. 7.1 DUART DC Electrical Characteristics Table 21 provides the DC electrical characteristics for the DUART interface of the MPC8347EA. Table 21. DUART DC Electrical Characteristics Parameter Symbol Min Max Unit High-level input voltage VIH 2OVDD + 0.3 V Low-level input voltage VIL –0.3 0.8 V Input current (0.8 V ≤ V IN ≤ 2 V) IIN —±5 μA ADDR/CMD/MODT tDDKHMH tDDKLDS tDDKHDS MDQ[x] MDQS[n] MCK[n] MCK[n] tMCK tDDKLDX tDDKHDX D1 D0 tDDKHAX,tDDKHCX Write A0 NOOP tDDKHMP tDDKHAS,tDDKHCS tDDKHME Output Z0 = 50 Ω RL = 50 Ω GVDD/2 |
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