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MPC8347ECVRADDB 数据表(PDF) 62 Page - Freescale Semiconductor, Inc |
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MPC8347ECVRADDB 数据表(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 99 page  MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12 62 Freescale Semiconductor Package and Pin Listings MPH1_D3_SPEED/DR_D3_SPEED A27 I/O OVDD — MPH1_D4_DP/DR_D4_DP B27 I/O OVDD — MPH1_D5_DM/DR_D5_DM C27 I/O OVDD — MPH1_D6_SER_RCV/DR_D6_SER_RCV D26 I/O OVDD — MPH1_D7_DRVVBUS/DR_D7_DRVVBUS E26 I/O OVDD — MPH1_NXT/DR_SESS_VLD_NXT D27 I OVDD — MPH1_DIR_DPPULLUP/ DR_XCVR_SEL_DPPULLUP A28 I/O OVDD — MPH1_STP_SUSPEND/ DR_STP_SUSPEND F26 O OVDD — MPH1_PWRFAULT/ DR_RX_ERROR_PWRFAULT E27 I OVDD — MPH1_PCTL0/DR_TX_VALID_PCTL0 A29 O OVDD — MPH1_PCTL1/DR_TX_VALIDH_PCTL1 D28 O OVDD — MPH1_CLK/DR_CLK B29 I OVDD — USB Port 0 MPH0_D0_ENABLEN/DR_D8_CHGVBUS C29 I/O OVDD — MPH0_D1_SER_TXD/DR_D9_DCHGVBUS A30 I/O OVDD — MPH0_D2_VMO_SE0/DR_D10_DPPD E28 I/O OVDD — MPH0_D3_SPEED/DR_D11_DMMD B30 I/O OVDD — MPH0_D4_DP/DR_D12_VBUS_VLD C30 I/O OVDD — MPH0_D5_DM/DR_D13_SESS_END A31 I/O OVDD — MPH0_D6_SER_RCV/DR_D14 B31 I/O OVDD — MPH0_D7_DRVVBUS/DR_D15_IDPULLUP C31 I/O OVDD — MPH0_NXT/DR_RX_ACTIVE_ID B32 I OVDD — MPH0_DIR_DPPULLUP/DR_RESET A32 I/O OVDD — MPH0_STP_SUSPEND/DR_TX_READY A33 I/O OVDD — MPH0_PWRFAULT/DR_RX_VALIDH C32 I OVDD — MPH0_PCTL0/DR_LINE_STATE0 D31 I/O OVDD — MPH0_PCTL1/DR_LINE_STATE1 E30 I/O OVDD — MPH0_CLK/DR_RX_VALID B33 I OVDD — Programmable Interrupt Controller MCP_OUT AN33 O OVDD 2 IRQ0/MCP_IN/GPIO2[12] C19 I/O OVDD — IRQ[1:5]/GPIO2[13:17] C22, A22, D21, C21, B21 I/O OVDD — Table 55. MPC8347EA (TBGA) Pinout Listing (continued) Signal Package Pin Number Pin Type Power Supply Notes |
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