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GMS81C7008 数据表(PDF) 31 Page - Hynix Semiconductor |
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GMS81C7008 数据表(HTML) 31 Page - Hynix Semiconductor |
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31 / 123 page ![]() GMS81C7008/7016 APR., 2001 Ver 2.01 27 Three registers are mapped on same address. Two registers are mapped on same address. Address Timer/Counter mode Capture mode PWM mode E1H T0 [R], TDR0 [W] CDR0 [R], TDR0 [W] - E3H TDR1 [W] TDR1 [W] T1PPR [W] E4H T1 [R] CDR1 [R] T1PDR [R/W] E7H T2 [R], TDR2 [W] CDR2 [R], TDR2 [W] - E9H TDR3 [W] TDR3 [W] T3PPR [W] EAH T3 [R] CDR3 [R] T3PDR [R/W] Address Basic Interval Timer F4H BITR [R], CKCTLR [W] |
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