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GMS81C7008 数据表(PDF) 66 Page - Hynix Semiconductor |
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GMS81C7008 数据表(HTML) 66 Page - Hynix Semiconductor |
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66 / 123 page  GMS81C7008/7016 62 APR., 2001 Ver 2.01 16. BUZZER FUNCTION The buzzer driver block consists of 6-bit binary counter, buzzer register, and clock source selector. It generates square-wave which has very wide range frequency (500Hz ~ 250kHz at fXIN= 4MHz) by user software. A 50% duty pulse can be output to R30/BUZ pin to use for piezo- electric buzzer drive. Pin R30 is assigned for output port of Buzz- er driver by setting the bit 5 of PMR (address D9H) to “1”. At this time, the pin R30 must be defined as output mode (the bit 0 of R3DD=1). Example: 2.4kHz output at 4MHz. LDM R3DD,#XXXX_XXX1B LDM BUR,#0111_0011B SET1 PMR.5 ;BUZ ON CLR1 PMR.5 ;BUZ OFF X means don’t care The bit 0 to 5 of BUR determines output frequency for buzzer driving. Equation of frequency calculation is shown below. fBUZ: Buzzer frequency fXIN: Oscillator frequency Divide Ratio: Prescaler divide ratio by BUCK[1:0] BUR: Lower 6-bit value of BUR. Buzzer period value. The frequency of output signal is controlled by the buzzer control register BUR.The BUR[5:0] determine output frequency for buzzer driving. Figure 16-1 Block Diagram of Buzzer Driver Figure 16-2 PMR and Buzzer Register f BUZ f XIN 2 DivideRatio BUR 5:0 [] 1 + () × × ---------------------------------------------------------------------------------------- = ÷8 ÷32 ÷16 ÷64 R30/BUZ PIN PMR.5 R30 port data 0 1 F/F ÷2 Comparator 6-bit Compare Data 6-bit Binary Counter MUX 00 01 10 11 BUR[5:0] [0FDH] BUR[7:6] fXIN fSXIN 0X 1X SCMR[1:0] BUR[5:0] BUR ADDRESS: 0FDH RESET VALUE: Undefined W WWW W W Source clock select 00: ÷ 8 01: ÷ 16 10: ÷ 32 11: ÷ 64 Define Frequency of Buzzer signal WW BUCK1 BUCK0 R30/BUZ Selection PMR ADDRESS: 0D9H RESET VALUE: 00H R/W R/W R/W R/W R/W R/W 0: R30 port (Turn off buzzer) R/W R/W PWM1 BUZ PWM0 INT0 INT1 INT2 EC0 EC2 1: BUZ port (Turn on buzzer) |
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