GMS81C7008 datasheet(63/123 Pages) HYNIX

63 / 123 page

GMS81C7008/7016

APR., 2001 Ver 2.01

15. SERIAL COMMUNICATION

The serial interface is used to transmit/receive 8-bit data serially.

Serial communication block consists of serial I/O data register,

serial I/O mode register, clock selection circuit, octal counter and

control circuit as illustrated in Figure 15-1.Pin R07/SIN, R06/

SOUT and R05/SCLK pins are controlled by the Serial Mode

ten into or read out by software.

The serial communication is activated by the instruction “SET1

SIOST”. The octal counter is reset to “0” by this instruction, starts

counting at the falling or rising edge (by POL selection) of the

transmit clock (SCLK), and it increments at the every clock. A se-

rial interrupt request flag is set when the eighth transmit clock

signal is input (the serial interface is reset) or when serial commu-

nication is discontinued (the octal counter is reset).

The data in the Serial Data Register can be shifted synchronously

with the transfer clock signal.

Figure 15-1 SCI Control Register

SCK1

SCK0

SCLK/R05 Port

Clock Source

Prescaler Divide Ratio

SCLK output

Internal clock

÷ 4

SCLK output

Internal clock

÷ 16

SCLK output

Internal clock

Use clock from Timer 0 overflow

SCLK input

External clock

BTCL

765

432

MSB

POL

SIOST

Serial transmission status bit

Serial transmission Clock selection

INITIAL VALUE: 0000_0001B

ADDRESS: 0FEH

SIOM

SIOSF

MSB first or LSB first

0: LSB First

1: MSB First

R/W

00: fXIN ÷ 4

01: fXIN ÷ 16

10: Timer 0 Overflow

11: External Clock

0: Serial transmission is in progress

1: Serial transmission is completed

Serial transmission start bit

Setting this bit starts an Serial transmission.

After one cycle, bit is cleared to “0” by hardware.

SCK1 SCK0

SIO1

SIO0

R/W

Serial transmission Operation Mode

00: Normal Port(R05,R06,R07)

01: Sending Mode(SCLK,SOUT,R07)

10: Receiving Mode(SCLK,R06,SIN)

11: Sending & Receiving Mode(SCLK,SOUT,SIN)

INITIAL VALUE: Undefined

ADDRESS: 0FFH

SIOR

BTCL

R/W R/W R/W R/W

R/W R/W

R/W

Sending Data during Sending Mode

Receiving Data during Receiving Mode

Selection Polarity

0: Data in on rising edge, data out on falling edge

1: Data in on falling edge, data out on rising edge

R/W

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