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ICS5342 数据表(PDF) 14 Page - Integrated Circuit Systems |
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ICS5342 数据表(HTML) 14 Page - Integrated Circuit Systems |
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14 / 36 page ![]() ICS5342 GENDAC 14 Functional Description This section describes the register address and bit definition for the RAMDAC and the Frequency Synthesizer sections. Color Palette Command Register (RS0-RS2 = 011) (RS0-RS1 = 01 with hidden flag) By setting bits 4 and 7-5 in the command register the ICS5342 can be programmed for different color modes and the DACs can be turned off for low power operation. Bit 7-4 Color Mode Select - These three bits select the Color Mode of RAMDAC operation as shown in the following table “Color Mode Select” (default is 0 at power up). Bit 3-2 (Reserved) Set to ‘0’ for future compatibility. Bit 1 Test Mode - When bit 1 is set checksum accumu- lation is enabled. If bit 0 is also set the oscillator and synthesizers are turned off for minimum noise. Bit 0 Power Down Mode of RAMDAC - When this bit is set to 0 (default is 0), the device operates nor- mally. If this bit is set to 1, the power and clock to the Color Palette RAM and DACs are turned off. The data in the Color Palette RAM are still preserved. The CPU can access without loss of data by internal automatic clock start/stop con- trol. The DAC outputs become the same as BLANK* (sync) level output during power down mode. This bit does not affect the PLL clock syn- thesizer function unless test mode is enabled. Command Registers 7654 3 2 1 0 2103 Reserved = 0 Test mode Snooze Color Mode Select 8-BIT INTERFACE Mode Number CM3 (CR4) CM2 (CR7) CM1 (CR6) CM0 (CR5) Color Mode Clock Cycles/ Pixel Bits 0 0000 8-bit Pseudo Color With Palette (default) 1 1 0001 15-bit Direct Color With Bypass (Hi-Color) 2 3 0010 24-Bit True Color With Bypass (True Color) 3 2 0011 16-bit Direct Color With Bypass (XGA) 2 1 0100 15-bit Direct Color With Bypass (hi-color) 2 1 0101 15-bit Direct Color With Bypass (Hi-Color) 2 2 0110 15-bit Direct Color With Bypass (Hi-Color) 2 3 0111 24-bit True Color With Bypass (True Color) 3 16-BIT INTERFACE Mode Number CM3 (CR4) CM2 (CR7) CM1 (CR6) CM0 (CR5) Color Mode Clock Cycles/ Pixel Bits 4 1000 Multiplexed 16-bit Pseudo Color With Palette 1/2 5 1001 15-bit Direct Color With Bypass (Hi-Color) 1 6 1010 16-bit Direct Color With Bypass (XGA 1 7 1011 24-bit True Color With Bypass (True Color) 2 8 1100 24-bit Packed True Color With Bypass (true-color) 3/2 1101 Reserved 1110 Reserved 1111 Reserved |
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