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ICS5342

GENDAC

Recommended Layout

VIA to power plane

VIA to ground plane

PCLK

XVDD

XGND

XOUT

XIN

GENDAC II

ICS5342

CLK1

DGND

VAA

FB1

C1 0.047

µF chip capacitor

C2 0.1

µF chip capacitor

C3 10

µF tantalum capacitor

FB1 ferrite bead, Fair-Rite 2743019447

R1 33 ohm

R2 100 ohm

R3 141 ohm, 1%

R4 220 ohm

R5 560 ohm

Y1 parallel resonant crystal cut for C

L = 12 pF

LOCATE NEAR

CONTROLLER

LOCATE NEAR

CONTROLLER

VAA

VREF

CGND

DGND

5342_30

Board Layout and Analog Signal Consider-

ations

The high performance of the GENDAC is dependent on care-

ful PC board layout. The use of a four layer board (internal

power and ground planes, signals on the two surface layers) is

recommended. The ground plane layer should be closest to the

component side of the board. The layout following this sec-

tion shows a suggested configuration.

Power Supply

As a high speed CMOS device, the GENDAC may draw large

transient currents from the power supply. It is necessary to

adopt high-frequency board-layout and power-distribution

techniques to assure proper operation of the GENDAC. This

will also minimize radio frequency interference (RFI). DAC

to DAC crosstalk can also be attributed to a high impedance

power supply.

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