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AD1953 数据表(PDF) 5 Page - Analog Devices

部件名 AD1953
功能描述  SigmaDSP 3-Channel, 26-Bit Signal Processing DAC
PDF  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD1953 数据表(HTML) 5 Page - Analog Devices

  AD1953_15 Datasheet HTML 1Page - Analog Devices AD1953_15 Datasheet HTML 2Page - Analog Devices AD1953_15 Datasheet HTML 3Page - Analog Devices AD1953_15 Datasheet HTML 4Page - Analog Devices AD1953_15 Datasheet HTML 5Page - Analog Devices AD1953_15 Datasheet HTML 6Page - Analog Devices AD1953_15 Datasheet HTML 7Page - Analog Devices AD1953_15 Datasheet HTML 8Page - Analog Devices AD1953_15 Datasheet HTML 9Page - Analog Devices Next Button
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REV. 0
–5–
AD1953
DIGITAL TIMING
Parameter
Min
Typ
Max
Unit
tDMD
MCLK Recommended Duty Cycle @ 12.288 MHz (256 fS Mode)
45
55
%
tDMD
MCLK Recommended Duty Cycle @ 24.576 MHz (512 fS Mode)
40
60
%
tDMD
MCLK Delay (All Mode)
25
ns
tDBH
BCLK Low Pulsewidth
10
ns
tDBH
BCLK High Pulsewidth
10
ns
tDBD
BCLK Delay (to BCLKO)
25
ns
tDLS
LRCLK Setup
0
ns
tDLH
LRCLK Hold
10
ns
tDLD
LRCLK Delay (to LRCLKO)
25
ns
tDDS
SDATA Setup
0
ns
tDDH
SDATA Hold
10
ns
tDDD
SDATA Delay (to SDATAO)
25
ns
tTFS
TDMFS Delay (from MCLK)
35
ns
tTBS
TDMBC Delay (from MCLK)
35
ns
tTOS
TDMO Delay (from TDMBC)
5
ns
tCCL
CCLK Low Pulsewidth
12
ns
tCCH
CCLK High Pulsewidth
12
ns
tCLS
CLATCH Setup
10
ns
tCLH
CLATCH Hold
10
ns
tCLD
CLATCH High Pulsewidth
10
ns
tCDS
CDATA Setup
0
ns
tCDH
CDATA Hold
10
ns
tCOD
COUT Delay
35
ns
tCOH
COUT Hold
2
ns
tDCD
DCSOUT Delay
35
ns
tDCH
DCSOUT Hold
2
ns
tPDRP
PD/RST Low Pulsewidth
5
ns
Specifications subject to change without notice.
DIGITAL FILTER CHARACTERISTICS at 44.1 kHz
Parameter
Min
Typ
Max
Unit
Pass-Band Ripple
±0.01
dB
Stop-Band Attenuation
70
dB
Pass Band
20
kHz
0.4535
fS
Stop Band
24
kHz
0.5442
fS
Group Delay
24.625/fS
sec
Specifications subject to change without notice.



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