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AD1953

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Volume Registers

The AD1953 contains eight 22-bit volume registers, one each

for the left, right, and subwoofer channels and an additional five

registers to be used by custom programs used in multichannel

applications. These registers are special because when the volume

is changed from an initial value to a new value, a linear ramp is

used to interpolate between the two values. This feature prevents

audible clicks and pops when changing volume. The ramp is

set so that it takes 512 audio frames to decrement from a volume of

1.0 (default) down to 0 (muted). The volume registers are for-

matted in 2.20 twos complement, meaning that 010000000

0000000000000 is interpreted as 1.0. Negative values can also be

written to the volume register, causing an inversion of the signal.

Negative values work as expected with the ramp feature; to go

from +1.0 to –1.0 will take 1024 LRCLKs, and the volume will

pass through 0 on the way.

Parameter RAM Contents

Table VI shows the contents of the parameter RAM. The

parameter RAM is 22 bits wide and occupies SPI addresses

0–255. The low addresses of the RAM are used to control the

biquad filters. There are 22 biquad filters in all, and each

biquad has five coefficients, resulting in a total memory usage

of 110 coefficients. There are also two tables of 33 coefficients

each that define the main and sub compressor input/output

characteristics. These are loaded with 1.0 on power-up, resulting

in no compression. Other RAM entries control other compressor

characteristics, as well as delay and spatialization settings.

The parameter RAM is initialized on power-up by an on-board

boot ROM. The default values (shown in the table) yield no

equalization, no compression, no spatialization, no delay, and

“normal” detector time constants in the compressor sections.

The functionality of the AD1953 on power-up is basically that

of a normal audio DAC with no signal-processing capability.

The data format of the Parameter RAM is twos complement

2.20 format. This means that the coefficients may range from

+2.0 (–1 LSB) to –2.0, with 1.0 represented by the binary word

0100000000000000000000.

Table VI. Parameter RAM Contents

Default Value

in Fractional

Address

Function

2.20 Format

IIR0 Left b0

1.0

IIR0 Left b1

IIR0 Left b2

IIR0 Left a1

IIR0 Left a2

IIR1 Left b0

1.0

IIR1 Left b1

IIR1 Left b2

IIR1 Left a1

IIR1 Left a2

IIR2 Left b0

1.0

IIR2 Left b1

IIR2 Left b2

IIR2 Left a1

IIR2 Left a2

IIR3 Left b0

1.0

IIR3 Left b1

IIR3 Left b2

IIR3 Left a1

IIR3 Left a2

IIR4 Left b0

1.0

IIR4 Left b1

IIR4 Left b2

IIR4 Left a1

IIR4 Left a2

IIR5 Left b0

1.0

IIR5 Left b1

IIR5 Left b2

IIR5 Left a1

IIR5 Left a2

IIR6 Left b0

1.0

IIR6 Left b1

IIR6 Left b2

IIR6 Left a1

IIR6 Left a2

IIR0 Right b0

1.0

Table VI. Parameter RAM Contents (continued)

Default Value

in Fractional

Address

Function

2.20 Format

IIR0 Right b1

IIR0 Right b2

IIR0 Right a1

IIR0 Right a2

IIR1 Right b0

1.0

IIR1 Right b1

IIR1 Right b2

IIR1 Right a1

IIR1 Right a2

IIR2 Right b0

1.0

IIR2 Right b1

IIR2 Right b2

IIR2 Right a1

IIR2 Right a2

IIR3 Right b0

1.0

IIR3 Right b1

IIR3 Right b2

IIR3 Right a1

IIR3 Right a2

IIR4 Right b0

1.0

IIR4 Right b1

IIR4 Right b2

IIR4 Right a1

IIR4 Right a2

IIR5 Right b0

1.0

IIR5 Right b1

IIR5 Right b2

IIR5 Right a1

IIR5 Right a2

IIR6 Right b0

1.0

IIR6 Right b1

IIR6 Right b2

IIR6 Right a1

IIR6 Right a2

IIR0 Xover Left b0

1.0

IIR0 Xover Left b1

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