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AD1953 数据表(PDF) 26 Page - Analog Devices |
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AD1953 数据表(HTML) 26 Page - Analog Devices |
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26 / 36 page ![]() REV. 0 AD1953 –26– Table VIII. Parameter RAM Read/Write Format (Single Address) Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 00000, R/Wb, Adr[9:8] Adr[7:0] 00, Param[21:16] Param[15:8] Param[7:0] ADR Byte 5 Byte 8 Byte 6 Byte 9 Byte 7 Byte 10 ADR + 1 ADR + 2 Table IX. Parameter RAM Block Read/Write Format (Burst Mode) Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 00000, R/Wb, Adr[9:8] Adr[7:0] 00, Param[21:16] Param[15:8] Param[7:0] Table X. Program RAM Read/Write Format (Single Address) Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 00000, R/Wb, Adr[9:8] Adr[7:0] 00000, Prog[34:32] Prog[31:24] Prog[23:16] Prog[15:8] Prog[7:0] Table XI. Program RAM Block Read/Write Format (Burst Mode) Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 00000, R/Wb, Adr[9:8]Adr[7:0] 00000, Prog[34:32] Prog[31:24] Prog[23:16] Prog[15:8] Prog[7:0] ADR Byte 7 Byte 12 Byte 8 Byte 13 Byte 9 Byte 14 Byte 10 Byte 15 Byte 11 Byte 16 ADR + 1 ADR + 2 Table XII. SPI Control Register 1 Write Format Byte 0 Byte 1 Byte 2 Byte 3 00000, R/Wb, Adr[9:8] Adr[7:0] 00, Bit[13:8] Bit[7:0] Table XIII. SPI Control Register 1 Read Format Byte 0 Byte 1 Byte 2 00000, R/Wb, Adr[9:8] Adr[7:0] 000000, Bit[1:0] Table XIV. SPI Control Register 2 Write Format Byte 0 Byte 1 Byte 2 Byte 3 00000, R/Wb, Adr[9:8] Adr[7:0] 000000, Bit[9:8] Bit[7:0] Table XV. SPI Volume Register Write Format Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 000000, Adr[9:8] Adr[7:0] 00, Volume[21:16] Volume[15:8] Volume[7:0] SPI READ/WRITE DATA FORMATS The read/write formats of the SPI port are designed to be byte- oriented. This allows for easy programming of common microcontroller chips to fit into a byte-oriented format; 0s are appended to the data fields to extend the data-word to the next multiple of eight bits. For example, 22-bit words written to the SPI parameter RAM are appended with two leading zeros to reach 24 bits (three bytes), and 35-bit words written to the program RAM are appended with five zeros to reach 40 bits (five bytes). These zero-extended data fields are appended to a 2-byte field consisting of a read/write bit and a 10-bit address. The SPI port knows how many data bytes to expect based on the address that is received in the first two bytes. The total number of bytes for a single-location SPI write command can vary from four bytes (for a control register write), to seven bytes (for a program RAM write). Block writes may be used to fill contiguous locations in program RAM or parameter RAM. |
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