ADE7166_15 datasheet(32/152 Pages) AD

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ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569

Rev. B | Page 32 of

152

POWER SUPPLY ARCHITECTURE

Each ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE7569 has two power supply inputs, VDD and VBAT, which

require only a single 3.3 V power supply at VDD for full operation.

A battery backup, or secondary power supply, with a maximum

of 3.7 V can be connected to the VBAT input. Internally, the

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569

connect VDD or VBAT to VSWOUT, which is used to derive power for

the device circuitry. The VSWOUT output pin reflects the voltage at

the internal power supply (VSWOUT) and has a maximum output

current of 6 mA. This pin can also be used to power a limited

number of peripheral components. The 2.5 V analog supply (VINTA)

and the 2.5 V supply for the core logic (VINTD) are derived by on-

chip linear regulators from VSWOUT. Figure 32 shows the power

supply architecture of the ADE7116/ADE7156/ADE7166/

ADE7169/ADE7566/ADE7569.

The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE7569 provide automatic battery switchover between VDD

and VBAT based on the voltage level detected at VDD or VDCIN. In

addition, the BCTRL input can be used to trigger a battery

switchover. The conditions for switching VSWOUT from VDD to

VBAT and back to VDD are described in the Battery Switchover

section. VDCIN is an input pin that can be connected to a 0 V to

3.3 V dc signal. This input is intended for power supply super-

visory purposes and does not provide power to the ADE7116/

ADE7156/ADE7166/ADE7169/ADE7566/ADE7569 circuitry.

POWER SUPPLY

MANAGEMENT

LDO

VINTD

LDO

VINTA

ADC

VSW

ADC

SCRATCH PAD

LCD

RTC

TEMPERATURE ADC

3.3V

MCU

ADE

SPI/I2C

UART

2.5V

VDCIN VDD VBAT

VSWOUT

BCTRL

*NOT AVAILABLE IN THE ADE7116.

Figure 32. Power Supply Architecture

BATTERY SWITCHOVER

The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE7569 monitor VDD, VBAT, and VDCIN. Automatic battery switch-

over from VDD to VBAT can be configured based on the status of

the VDD, VDCIN, or BCTRL pin. Battery switchover is enabled by

default. Setting Bit 1 in the Battery Switchover Configuration SFR

(BATPR, Address 0xF5) disables battery switchover so that VDD

is always connected to VSWOUT (see Table 19). The source of

VSWOUT is indicated by Bit 6 in the Peripheral Configuration SFR

(PERIPH, Address 0xF4), which is described in Table 20. Bit 6 is

set when VSWOUT is connected to VDD and cleared when VSWOUT is

connected to VBAT.

The battery switchover functionality provided by the ADE7116/

ADE7156/ADE7166/ADE7169/ADE7566/ADE7569 allows a

seamless transition from VDD to VBAT. An automatic battery

switchover option ensures a stable power supply to the device, as

long as the external battery voltage is above 2.75 V. It allows

continuous code execution even while the internal power

supply is switching from VDD to VBAT and back. Note that the

energy metering ADCs are not available when VBAT is being

used for VSWOUT.

Power supply monitor (PSM) interrupts can be enabled to

indicate when battery switchover occurs and when the VDD

power supply is restored (see the Power Supply Management

(PSM) Interrupt section.)

VDD to VBAT

The following three events switch the internal power supply

(VSWOUT) from VDD to VBAT:

•

VDCIN < 1.2 V. When VDCIN falls below 1.2 V, VSWOUT

switches from VDD to VBAT. This event is enabled when the

BATPRG[1:0] bits in the battery switchover configuration

SFR (BATPR, Address 0xF5) = 0b01. Setting these bits

disables switchover based on VDCIN. Battery switchover on

low VDCIN is disabled by default.

•

VDD < 2.75 V. When VDD falls below 2.75 V, VSWOUT

switches from VDD to VBAT. This event is enabled when the

BATPRG[1:0] bits in the BATPR SFR are cleared.

•

Falling edge on BCTRL. When the battery control pin,

BCTRL, goes low, VSWOUT switches from VDD to VBAT. This

external switchover signal can trigger a switchover to VBAT

at any time. Setting the INT1PRG bits to X01 in the

interrupt pins configuration SFR (INTPR, Address 0xFF)

enables the battery control pin (see Table 17).

Switching from VBAT to VDD

To switch VSWOUT from VBAT to VDD, all of the following events

must be true:

•

VDD > 2.75 V. VSWOUT switches back to VDD after VDD remains

above 2.75 V.

•

VDCIN > 1.2 V and VDD > 2.75 V. If the low VDCIN condition

is enabled, VSWOUT switches to VDD after VDCIN remains

above 1.2 V and VDD remains above 2.75 V.

•

Rising edge on BCTRL. If the battery control pin is enabled,

VSWOUT switches back to VDD after BCTRL is high, and the

first or second bullet point is satisfied.

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