ADE7166_15 datasheet(4/152 Pages) AD

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ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569

Rev. B | Page 4 of

152

GENERAL DESCRIPTION

The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE75691 integrate the Analog Devices, Inc., energy (ADE)

metering IC analog front end and fixed function DSP solution

with an enhanced 8052 MCU core, an RTC, an LCD driver, and

all the peripherals to make an electronic energy meter with an

LCD display in a single part.

The ADE measurement core includes active, reactive, and apparent

energy calculations, as well as voltage and current rms measure-

ments. This information is accessible for energy billing by using

the built-in energy scalars. Many power line supervisory features

such as SAG, peak, and zero crossing are included in the energy

measurement DSP to simplify energy meter design.

The microprocessor functionality includes a single-cycle 8052

core, a real-time clock with a power supply backup pin, an SPI

or I2C® interface, and a UART interface. The ready-to-use infor-

mation from the ADE core reduces the program memory size

requirement, making it easy to integrate complicated design

into 16 kB of flash memory.

The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE7569 also include a 108-/104-segment LCD driver. In the

ADE7166/ADE7169/ADE7566/ADE7569, this driver generates

voltages capable of driving LCDs up to 5 V.

1 Patents pending.

FUNCTIONAL BLOCK DIAGRAMS

ENERGY

MEASUREMENT

DSP

OSC

COM0

...

COM3

LDO

3V/5V LCD

CHARGE PUMP

SINGLE

CYCLE

8052

MCU

ADE7566/ADE7569

FP26

VBAT

DGND

AGND

UART

SERIAL

PORT

LCDVA

LCDVB

LCDVC

FP0

FP15

RTC

LCDVP2

FP16

FP17

FP23

FP22

FP21

FP20

FP19

FP18

FP25

FP24

1.20V

REF

FP28

FP27

43 42

39 38 7

38 39 40 41

PGA2

–

PGA1

–

ADC

TEMP

ADC

VDCIN

ADC

PROGRAM MEMORY

16kB FLASH

POWER SUPPLY

CONTROL AND

MONITORING

USER RAM

256 BYTES

USER XRAM

256 BYTES

TEMP

SENSOR

BATTERY

ADC

SPI/I2C

SERIAL

INTERFACE

3 × 16-BIT

COUNTER

TIMERS

108-SEGMENT

LCD DRIVER

WATCHDOG

TIMER

DOWNLOADER

DEBUGGER

PLL

LDO

UART

TIMER

POR

45 11 43 42 41 40 39 38

37 36 5

9 10

P2.0/FP18

P2.1/FP17

P2.2/FP16

P2.3 (SDEN/P2.3)

Figure 1. ADE7566/ADE7569 Functional Block Diagram

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