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AN2021 数据表(PDF) 36 Page - STMicroelectronics |
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AN2021 数据表(HTML) 36 Page - STMicroelectronics |
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36 / 39 page ![]() Electrical characteristics AN2021 36/39 5.2.2 Hi-speed synchronous serial interface (SSC) The maximum baudrate of the SSC in the ST10F272 is 8 Mbaud whereas it is 10 Mbaud in the ST10F269. For CPU frequencies strictly higher than 32 MHz, the minimum value in the SSCBR register (prescaler value) must not be lower than 2. t28 CC Address/Unlatched CS hold after RD, WR 0 (no tF) -5 + tF (tF > 0) -0 + tF - 0 (no tF) -5 + tF (tF > 0) -0 + tF - t39SR Latched CS low to valid data in - 3 TCL - 19 + 2tA + tC - 3 TCL - 21 + 2tA + tC 18.5 + 2tA + tC - 16.5 + 2tA + tC - t82CC Address setup to RdCS, WrCS (with RW delay) 2 TCL - 10.5 + 2tA - 2 TCL - 11 + 2tA - 14.5 + 2tA - 14 + 2tA - Table 21. Demultiplexed bus timings (continued) Symbol Parameter ST10F269 ST10F272 ST10F269 @fCPU = 40 MHz ST10F272 @fCPU = 40 MHz Min Max Min Max Min Max Min Max |
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