DM385 datasheet(127/281 Pages) TI

127 / 281 page

DM385, DM388

www.ti.com

SPRS821D – MARCH 2013 – REVISED DECEMBER 2013

6.4

Electrical Characteristics Over Recommended Ranges of Supply Voltage and

Operating Temperature (Unless Otherwise Noted)

PARAMETER

TEST CONDITIONS(1)

MIN

TYP

MAX

UNIT

Low/Full speed: USBx_DM

2.8

VDDA_USB_3P

and USBx_DP

High speed: USBx_DM and

360

440

USBx_DP

High-level output voltage,

3.3 V, DVDDx = MIN,

2.4

LVCMOS(2) (3.3-V I/O)

IOH = MAX

High-level output voltage,

1.8 V, DVDDx = MIN,

1.26

LVCMOS(2) (1.8-V I/O)

IOH = MAX

VOH

High-level output voltage,

1.8 V, IOL = 6mA, 50

DVDD_DDR[0] -

DDR[0] signals in DDR2

ohm load

0.4

mode

HIgh-level output voltage,

1.5 V, IOL = 6mA, 50

DVDD_DDR[0] -

DDR[0] signals in DDR3

ohm load

0.4

mode

HIgh-level output voltage,

1.35 V, IOL = 6mA, 50

DVDD_DDR[0] -

DDR[0] signals in DDR3L

ohm load

0.4

mode

Low/Full speed: USBx_DM

0.0

0.3

and USBx_DP

High speed: USBx_DM and

-10

USBx_DP

Low-level output voltage,

3.3 V, DVDDx = MAX,

0.4

LVCMOS(2) (3.3-V I/O)

IOL = MAX

Low-level output voltage,

1.8 V, DVDDx = MAX,

0.4

LVCMOS(2) (1.8-V I/O)

IOL = MAX

Low-level output voltage, I2C 1.8/3.3 V, IOL = 4mA

0.4

VOL

(I2C[0], I2C[1])

Low-level output voltage,

1.8 V, IOL = 6mA, 50

DDR[0] signals in DDR2

ohm load

0.4

mode

Low-level output voltage,

1.5 V, IOL = 6mA, 50

DDR[0] signals in DDR3

ohm load

0.4

mode

Low-level output voltage,

1.35 V, IOL = 6mA, 50

DDR[0] signals in DDR3L

ohm load

0.4

mode

LDOs (applies to all

1.5

LDOCAP_x pins)

(1)

For test conditions shown as MIN, MAX, or TYP, use the appropriate value specified in the recommended operating conditions table.

(2)

LVCMOS pins are all I/O pins powered by DVDD, DVDD_GPMC, DVDD_RGMII, DVDD_SD, DVDD_C supplies except for I2C[0] and

I2C[1] pins.

Device Operating Conditions

127

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