PIC16LC773 datasheet(11/200 Pages) MICROCHIP

11 / 200 page

PIC16C77X

Advance Information

DS30275A-page 11

2.0

MEMORY ORGANIZATION

There are two memory blocks in each of these

PICmicro® microcontrollers. Each block (Pro-

gram Memor y and Data Memor y) has its own bus

so that concurrent access can occur.

Additional information on device memory may be found

in the PICmicro

™ Mid-Range Reference Manual,

(DS33023).

2.1

Program Memory Organization

The PIC16C77X PICmicros have a 13-bit program

counter capable of addressing an 8K x 14 program

memory space. Each device has 4K x 14 words of pro-

gram memory. Accessing a location above the physi-

cally implemented address will cause a wraparound.

The reset vector is at 0000h and the interrupt vector is

at 0004h.

FIGURE 2-1:

PROGRAM MEMORY MAP

AND STACK

2.2

Data Memory Organization

The data memory is partitioned into multiple banks

which contain the General Purpose Registers and the

Special Function Registers. Bits RP1 and RP0 are the

bank select bits.

= 00

→ Bank0

= 01

→ Bank1

= 10

→ Bank2

= 11

→ Bank3

Each bank extends up to 7Fh (128 bytes). The lower

locations of each bank are reserved for the Special

Function Registers. Above the Special Function Regis-

ters are General Purpose Registers, implemented as

static RAM. All implemented banks contain special

function registers. Some “high use” special function

registers from one bank may be mirrored in another

bank for code reduction and quicker access.

2.2.1

GENERAL PURPOSE REGISTER FILE

The register file can be accessed either directly, or indi-

rectly through the File Select Register FSR.

PC<12:0>

0000h

0004h

0005h

Stack Level 1

Stack Level 8

Reset Vector

Interrupt Vector

On-chip

CALL, RETURN

RETFIE, RETLW

Stack Level 2

Program

Memory

Page 0

Page 1

07FFh

0800h

0FFFh

1000h

3FFFh

RP1

RP0

(STATUS<6:5>)

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