CF745 datasheet(37/217 Pages) MICROCHIP

37 / 217 page

Preliminary

DS30453B-page 37

PIC16C5X

7.4

Power-On Reset (POR)

The PIC16C5X family incorporates on-chip Power-On

Reset (POR) circuitry which provides an internal chip

reset for most power-up situations. To use this feature,

the user merely ties the MCLR/VPP pin to VDD. A

simpliﬁed block diagram of the on-chip Power-On

Reset circuit is shown in Figure 7-8.

The Power-On Reset circuit and the Device Reset

Timer (Section 7.5) circuit are closely related. On

power-up, the reset latch is set and the DRT is reset.

The DRT timer begins counting once it detects MCLR

to be high. After the time-out period, which is typically

18 ms, it will reset the reset latch and thus end the

on-chip reset signal.

A power-up example where MCLR is not tied to VDD is

shown in Figure 7-10. VDD is allowed to rise and

stabilize before bringing MCLR high. The chip will

actually come out of reset TDRT msec after MCLR

goes high.

In Figure 7-11, the on-chip Power-On Reset feature is

being used (MCLR and VDD are tied together). The

VDD is stable before the start-up timer times out and

there is no problem in getting a proper reset. However,

Figure 7-12 depicts a problem situation where VDD

rises too slowly. The time between when the DRT

senses a high on the MCLR/VPP pin, and when the

MCLR/VPP pin (and VDD) actually reach their full value,

is too long. In this situation, when the start-up timer

times out, VDD has not reached the VDD (min) value

and the chip is, therefore, not guaranteed to function

correctly. For such situations, we recommend that

external RC circuits be used to achieve longer POR

delay times (Figure 7-9).

For more information on PIC16C5X POR, see

Power-Up Considerations - AN522 in the Embedded

Control Handbook.

The POR circuit does not produce an internal reset

when VDD declines.

Note:

When the device starts normal operation

(exits the reset condition), device operat-

ing parameters (voltage, frequency, tem-

perature, etc.) must be meet to ensure

operation. If these conditions are not met,

the device must be held in reset until the

operating conditions are met.

FIGURE 7-9:

EXTERNAL POWER-ON

RESET CIRCUIT (FOR SLOW

VDD POWER-UP)

MCLR

PIC16C5X

VDD

• External Power-On Reset circuit is required

only if VDD power-up is too slow. The diode D

helps discharge the capacitor quickly when

VDD powers down.

• R < 40 k

Ω is recommended to make sure that

voltage drop across R does not violate the

device electrical speciﬁcation.

• R1 = 100

Ω to 1 kΩ will limit any current

ﬂowing into MCLR from external capacitor C

in the event of MCLR pin breakdown due to

Electrostatic Discharge (ESD) or Electrical

Overstress (EOS).

CF745 数据表(PDF) 37 Page - Microchip Technology

CF745 数据表(HTML) 37 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载