CF745 datasheet(41/217 Pages) MICROCHIP

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Preliminary

DS30453B-page 41

PIC16C5X

7.7

Time-Out Sequence and Power Down

Status Bits (TO/PD)

The TO and PD bits in the STATUS register can be

tested to determine if a RESET condition has been

caused by a power-up condition, a MCLR or Watchdog

Timer (WDT) reset, or a MCLR or WDT wake-up reset.

These STATUS bits are only affected by events listed

in Table 7-7.

Table 7-3 lists the reset conditions for the special

function registers, while Table 7-4 lists the reset

conditions for all the registers.

TABLE 7-6:

TO/PD STATUS AFTER

RESET

RESET was caused by

Power-up (POR)

MCLR reset (normal operation)(1)

MCLR wake-up reset (from SLEEP)

WDT reset (normal operation)

WDT wake-up reset (from SLEEP)

Legend: u = unchanged

Note 1:

The TO and PD bits maintain their status (u) until

a reset occurs. A low-pulse on the MCLR input

does not change the TO and PD status bits.

TABLE 7-7:

EVENTS AFFECTING TO/PD

STATUS BITS

Event

Remarks

Power-up

WDT Time-out

No effect on PD

SLEEP

instruction

CLRWDT

instruction

Legend: u = unchanged

Note:

A WDT time-out will occur regardless of

the status of the TO bit. A SLEEP instruc-

tion will be executed, regardless of the sta-

tus of the PD bit.

7.8

Reset on Brown-Out

A brown-out is a condition where device power (VDD)

dips below its minimum value, but not to zero, and then

recovers. The device should be reset in the event of a

brown-out.

To reset PIC16C5X devices when a brown-out occurs,

external brown-out protection circuits may be built, as

shown in Figure 7-14 and Figure 7-15.

FIGURE 7-14: BROWN-OUT PROTECTION

CIRCUIT 1

FIGURE 7-15: BROWN-OUT PROTECTION

CIRCUIT 2

This circuit will activate reset when VDD goes below Vz +

0.7V (where Vz = Zener voltage).

33k

10k

40k

VDD

MCLR

PIC16C5X

VDD

This brown-out circuit is less expensive, although

less accurate. Transistor Q1 turns off when VDD

is below a certain level such that:

VDD •

R1 + R2

= 0.7V

40k

VDD

MCLR

PIC16C5X

VDD

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