CF745 datasheet(20/217 Pages) MICROCHIP

20 / 217 page

PIC16C5X

DS30453B-page 20

Preliminary

4.3

STATUS Register

This register contains the arithmetic status of the ALU,

the RESET status, and the page preselect bits for

program memories larger than 512 words.

The STATUS register can be the destination for any

instruction, as with any other register. If the STATUS

the Z, DC or C bits, then the write to these three bits is

disabled. These bits are set or cleared according to

the device logic. Furthermore, the TO and PD bits are

not writable. Therefore, the result of an instruction with

the STATUS register as destination may be different

than intended.

For example, CLRF STATUS will clear the upper three

bits and set the Z bit. This leaves the STATUS register

as 000u u1uu (where u = unchanged).

It is recommended, therefore, that only BCF, BSF and

MOVWF

instructions be used to alter the STATUS

DC or C bits from the STATUS register. For other

instructions, which do affect STATUS bits, see

Section 8.0, Instruction Set Summary.

FIGURE 4-8:

STATUS REGISTER (ADDRESS:03h)

R/W-0

R-1

R/W-x

PA2

PA1

PA0

R = Readable bit

W = Writable bit

- n = Value at POR reset

bit7

bit0

bit 7:

PA2: This bit unused at this time.

Use of the PA2 bit as a general purpose read/write bit is not recommended, since this may affect upward

compatibility with future products.

bit 6-5:

PA1:PA0: Program page preselect bits (PIC16C56s/CR56s)(PIC16C57s/CR57s)(PIC16C58s/CR58s)

00 = Page 0 (000h - 1FFh) - PIC16C56s/CR56s, PIC16C57s/CR57s, PIC16C58s/CR58s

01 = Page 1 (200h - 3FFh) - PIC16C56s/CR56s, PIC16C57s/CR57s, PIC16C58s/CR58s

10 = Page 2 (400h - 5FFh) - PIC16C57s/CR57s, PIC16C58s/CR58s

11 = Page 3 (600h - 7FFh) - PIC16C57s/CR57s, PIC16C58s/CR58s

Each page is 512 words.

Using the PA1:PA0 bits as general purpose read/write bits in devices which do not use them for program

page preselect is not recommended since this may affect upward compatibility with future products.

bit 4:

TO: Time-out bit

1 = After power-up, CLRWDT instruction, or SLEEP instruction

0 = A WDT time-out occurred

bit 3:

PD: Power-down bit

1 = After power-up or by the CLRWDT instruction

0 = By execution of the SLEEP instruction

bit 2:

Z: Zero bit

1 = The result of an arithmetic or logic operation is zero

0 = The result of an arithmetic or logic operation is not zero

bit 1:

DC: Digit carry/borrow bit (for ADDWF and SUBWF instructions)

ADDWF

1 = A carry from the 4th low order bit of the result occurred

0 = A carry from the 4th low order bit of the result did not occur

SUBWF

1 = A borrow from the 4th low order bit of the result did not occur

0 = A borrow from the 4th low order bit of the result occurred

bit 0:

C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)

ADDWF

SUBWF

RRF or RLF

1 = A carry occurred

1 = A borrow did not occur

Load bit with LSb or MSb, respectively

0 = A carry did not occur

0 = A borrow occurred

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