A25LS512A datasheet(26/43 Pages) AMICC

26 / 43 page

A25LS512A Series

(November, 2014, Version 1.1)

AMIC Technology Corp.

Release

from

Deep

Power-down

and

Read

Electronic Signature (RES)

Once the device has entered the Deep Power-down mode,

all instructions are ignored except the Release from Deep

Power-down

and

Read

Electronic

Signature

(RES)

instruction. Executing this instruction takes the device out of

the Deep Power-down mode.

The instruction can also be used to read, on Serial Data

Output (DO), the 8-bit Electronic Signature as shown below.

Except while an Erase, Program or Write Status Register

cycle is in progress, the Release from Deep Power-down and

Read Electronic Signature (RES) instruction always provides

access to the 8-bit Electronic Signature of the device, and

can be applied even if the Deep Power-down mode has not

been entered.

Any Release from Deep Power-down and Read Electronic

Signature (RES) instruction while an Erase, Program or Write

Status Register cycle is in progress, is not decoded, and has

no effect on the cycle that is in progress.

The device is first selected by driving Chip Select ( S ) Low.

The instruction code is followed by 3 dummy bytes, each bit

being latched-in on Serial Data Input (DIO) during the rising

edge of Serial Clock (C). Then, the 8-bit Electronic Signature,

stored in the memory, is shifted out on Serial Data Output

(DO), each bit being shifted out during the falling edge of

Serial Clock (C).

The instruction sequence is shown in Figure 19.

The Release from Deep Power-down and Read Electronic

Signature (RES) instruction is terminated by driving Chip

Select ( S ) High after the Electronic Signature has been read

at least once. Sending additional clock cycles on Serial Clock

(C), while Chip Select ( S ) is driven Low, cause the

Electronic Signature to be output repeatedly.

When Chip Select ( S ) is driven High, the device is put in the

Stand-by Power mode. If the device was not previously in the

Deep Power-down mode, the transition to the Stand-by

Power mode is immediate. If the device was previously in the

Deep Power-down mode, though, the transition to the Stand-

by Power mode is delayed by tRES2, and Chip Select ( S )

must remain High for at least tRES2 (max), as specified in AC

Characteristics Table . Once in the Stand-by Power mode,

the device waits to be selected, so that it can receive, decode

and execute instructions.

Figure 19. Release from Deep Power-down and Read Electronic Signature (RES) Instruction Sequence and

Data-Out Sequence

DIO

Instruction

High Impedance

MSB

810

01 2 3 4 5 6 7

3 Dummy Bytes

28 29 30 31 32 33 34 35 36 37 38

23 22 21

3 21 0

6 54 32 10

RES2

Stand-by Mode

Deep Power-down Mode

Note: The value of the 8-bit Electronic Signature, for the A25LS512A is 05h.

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