VP310

PRELIMINARY DATA

15

2. VP310 software control

This section describes the sequences of register operations needed to acquire DVB and DSS

channels with known or unknown parameters.

Communication with the VP310 is via a standard I²C bus and the first byte following the chip

address, in write mode, is the register address (RADD).

The register map is organised to group important Read registers at the lowest addresses, then

the main control Write registers in the next block of addresses.

The first register to be written must be the Configuration register, which has been placed at the

highest register address, because it is only written once during the initialisation sequence.

The CONFIG register can only be reset by the hardware reset. The VP310 is held in a power

saving mode following the hardware reset.

After a hardware reset, the VP310 must be taken out of the power save mode by writing a one to

the MSB of the CONFIG register. When VP310 is not being used it can be put back into the

power save mode by writing a zero to the MSB of CONFIG.

2.1 Initialisation sequence

VP310 will be in the power save mode after a hardware reset. The first command to be written

must be to the CONFIGURATION register at address 127. After loading this register, wait 150µs

before writing to the RESET register. During this wait, the tuner can programmed to the required

channel frequency via the General Purpose Port (register 20).

Next write 128 to the RESET register (21) to reset the VP310 state machine and all parameter

registers to the default settings.

The default settings of the VP310 assumes a Gain Control Amplifier with a negative gain Vs

voltage slope, i.e. the gain increases with decreasing voltage. However, if this slope is positive,

the polarity of the AGC control signal can be inverted by programming 1 to bit B0 of the

AGC_CTRL register, i.e. by changing the default AGC_CTRL setting from 38 to 39. It is best to

do this immediately after writing 128 to the RESET register. Then the AGC loop can settle whilst

the other registers of VP310 are programmed. Note that the initial value, minimum value and the

maximum value of the AGC control voltage can also be programmed using the corresponding

VP310 registers.

After this, the LNB controls are defined, in register (22) DISEQC_MODE.

The signal parameters should then be written to the VP310. The symbol rate (registers 23 & 25

SYM_RATE) may be specified within ±2% of the required value, absolute precision is not

required to achieve successful lock and tracking. If the symbol rate is unknown, a search mode is

available.