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数据搜索系统，热门电子元器件搜索 |
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USB3503 数据表(PDF) 59 Page - Microchip Technology |
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USB3503 数据表(HTML) 59 Page - Microchip Technology |
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59 / 73 page  2011-2015 Microchip Technology Inc. DS00001584B-page 59 USB3503 Note 1: While RESET_N is driven low, all other inputs from Applications Processor should also be driven low in order to minimize current draw. 2: To disable a downstream port, tie DP and DM to VDD33_BYP pin of the USB3503. FIGURE 11-1: INTERNAL CHIP-TO-CHIP INTERFACE RBIAS RBIAS USBDN3_DP USBDN3_DM USBDN2_DM USBDN2_DP INT_N HUB_CONNECT SDA SCL REFCLK VDD_I2C RPU1 RPU1 USB3503A-1 VSS VDD33_BYP VDD_CORE_REG VDD12_BYP CVDD12BYP CVDD33BYP COUT COUT +1.8V VBAT VBAT VDD33_BYP Connect pins to either VDD33_BYP or GND. REF_SEL0 REF_SEL1 USBDN1_DM USBDN1_DP STROBE DATA VDD_INTN RPU2 RESET_N Applications Processor 3G Baseband Processor LTE Baseband Processor PORT_PWR OCS_N VDD33_BYP Port 1 Disabled OCS_N tied to VDD33_BYP when unused. |
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