USB3503 datasheet(12/73 Pages) MICROCHIP

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USB3503

DS00001584B-page 12

 2011-2015 Microchip Technology Inc.

3.3.2

I/O TYPE DESCRIPTIONS

3.3.3

REFERENCE CLOCK

The REFCLK input is can be driven with a square wave from 0 V to VDD33_BYP. The USB3503 only uses the positive

edge of the clock. The duty cycle is not critical.

The USB3503 is tolerant to jitter on the reference clock. The REFCLK jitter should be limited to a peak to peak jitter of

less than 1 ns over a 10

μs time interval. If this level of jitter is exceeded the USB3503 high speed eye diagram may be

degraded.

To select the REFCLK input frequency, the REF_SEL pins must be set according to Table 3-3 and Table 3-4. To select

the primary REFCLK frequencies defined in Table 3-3, INT_N must be sampled high during the Hub.Init stage. If the

INT_N pin is not used, the INT_N pin should be tied to VDD33_BYP. To select the secondary REFCLK frequencies

defined in Table 3-4, INT_N must be sampled low during the Hub.Init stage. If the INT_N pin is not used, the INT_N pin

should be tied to ground. Since the INT_N pin is open-drain during normal function, selecting the secondary REFCLK

frequencies requires that the INT_N pin be driven low from an external source during Hub.Init and then, after startup,

that external source must turn into an input to receive the INT_N signal.

POWER

1.2V VDD Power

VDD12_BYP

Power

1.2 V Regulator. A 1.0

μF (<1

Ω ESR) capacitor

to ground is required for regulator stability. The

capacitor should be placed as close as possible to

the USB3503.

3.3V VDD Power

VDD33_BYP

Power

3.3V Regulator. A 4.7

μF (<1

Ω ESR) capacitor to

ground is required for regulator stability. The

capacitor should be placed as close as possible to

the USB3503.

Core Power Supply Input

VDD_CORE_REG

Power

Power supply to 1.2V regulator.

This power pin should be connected to

VDD33_BYP for single supply applications.

Refer to Section 9.0 “Integrated Power

Regulators” for power supply configuration

options.

Battery Power Supply Input

VBAT

Power

Battery power supply.

Refer to Section 9.0 “Integrated Power

Regulators” for power supply configuration

options.

VSS

Ground

TABLE 3-2:

USB3503 I/O TYPE DESCRIPTIONS

I/O Type

Description

Digital Input.

Digital Output. Open Drain.

I/O

Digital Input or Output.

A-I/O

Analog Input or Output.

Power

DC input or Output.

Ground

Ground.

TABLE 3-1:

PIN DESCRIPTIONS (CONTINUED)

Name

Symbol

Type

Description

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