ADS5294IPFPR datasheet(28/81 Pages) TI1

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ADS5294

SLAS776D – NOVEMBER 2011 – REVISED SEPTEMBER 2015

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9 Detailed Description

9.1 Overview

The ADS5294 is an octal-channel, 14-bit, high-speed ADC with a sample rate of up to 80 MSPS that runs off a

single 1.8-V supply. All eight channels of the ADS5294 simultaneously sample the respective analog inputs at

the rising edge of the input clock. The sampled signal is sequentially converted by a series of small resolution

stages, with the outputs combined in a digital correction logic block. At every clock, edge the sample propagates

through the pipeline resulting in a data latency of 11 clock cycles.

The 14 data bits of each channel are serialized and sent out in either 1-wire mode (one pair of LVDS pins are

used) or 2-wire mode (two pairs of LVDS pins are used), depending on the LVDS output rate. When the data is

output in the 2-wire mode, it reduces the serial data rate of the outputs, especially at higher sampling rates. Low-

cost FPGAs are used to capture 80 MSPS / 14-bit data. Alternately, at lower sample rates, the 14-bit data is

output as a single data stream over one pair of LVDS pins (1-wire mode). The device outputs a bit clock at 7x

and frame clock at 1x the sample frequency in the 14-bit mode.

This 14-bit ADC achieves approximately 76-dBFS SNR at 80 MSPS. Its output resolution can be configured as

12-bit and 10-bit, if necessary. When the output resolution of the ADS5294 is 12-bit and 10-bit, SNR of 72 dBFS

and 61 dBFS (respectively) is achieved.

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ADS5294IPFPR 数据表(PDF) 28 Page - Texas Instruments