ADS5294IPFPR datasheet(66/81 Pages) TI1

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INP

INM

0.1uF

2 pF

0.1uF

Differential

Input

ADS529x

ADS5294

SLAS776D – NOVEMBER 2011 – REVISED SEPTEMBER 2015

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Typical Application (continued)

10.2.1 Design Requirements

The ADS5294 is a high-speed, multi-channel ADC suitable for medical imaging, communication systems, multi-

channel data acquisition, and so on. In all applications, the signal dynamic range, center frequency, and

bandwidth are the key requirements for the ADC selection.

The ADS5294 has a noise level of approximately 20 nV/

√Hz referred to its input, assuming of a sampling rate of

80 MHz, a 2-Vpp input, and 75.5-dBFS SNR. Suitable ADS5294 driver circuit shall be designed to achieve better

than 20 nV/

√Hz output referred noise.

10.2.2 Detailed Design Procedure

Use the following steps to design a typical data acquistion system:

1. Use the signal center frequency and signal bandwidth to select an appropriate ADC sampling frequency.

2. Use the transducer or sensor noise level and maximum input signal amplitude to select appropriate pre-

driver amplifiers.

3. Select appropriate low jitter clock for the ADC.

4. Determine whether to use the on-chip digital filters or decimation filters based on required SNR and pass

band shaping.

10.2.2.1 Large and Small Signal Input Bandwidth

The small signal bandwidth of the analog input circuit is high, around 550 MHz. When using an amplifier to drive

the ADS5294, consider the total noise of the amplifier up to the small signal bandwidth. The large signal

bandwidth of the device depends on the amplitude of the input signal. The ADS5294 supports 2 VPP amplitude

for input signal frequency up to 80 MHz. For higher frequencies (80 MHz), the amplitude of the input signal must

be decreased proportionally. For example, at 160 MHz, the device supports a maximum of 1 VPP signal.

10.2.2.2 Drive Circuit

For optimum performance, the analog inputs must be driven differentially which improves the common-mode

noise immunity and even order harmonic rejection. A 5-

Ω to 15-Ω resistor in series with each input pin is

recommended to damp-out ringing caused by package parasitic.

The drive circuit shows an R-C filter across the analog input pins. The purpose of the filter is to absorb the

glitches caused by the opening and closing of the sampling capacitors.

The output of the driver circuit referred noise shall be considered in order to maximize SNR of the ADS5294.

Figure 63. Analog Input Drive Circuit

10.2.2.3 Clock Selection

To ensure that the aperture delay and jitter are the same for all channels, the ADS5294 uses a clock tree

network to generate individual sampling clocks for each channel. The clock, for all the channels, are matched

from the source point to the sampling circuit of each of the eight internal ADCs. The variation on this delay is

described in the aperture delay parameter of the output interface timing. Its variation is given by the aperture jitter

number of the same table.

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